mt18vddt12872ag-40b Micron Semiconductor Products, mt18vddt12872ag-40b Datasheet - Page 9

• Manufacturer Part Number: mt18vddt12872ag-40b
• Description: 256mb, 512mb, 1gb, 2gb X72, Ecc, Dr 184-pin Ddr Sdram Udimm
• Manufacturer: Micron Semiconductor Products

I
Table 11:
PDF: 09005aef80814e61/Source: 09005aef807f8acb
DD18C32_64_128_256x72A.fm - Rev. C 10/07 EN
Parameter/Condition
Operating one bank active-precharge current:
t
Address and control inputs changing once every two clock cycles
Operating one bank active-read-precharge current: BL = 2;
t
changing once per clock cycle
Precharge power-down standby current: All device banks idle; Power-
down mode;
Idle standby current: CS# = HIGH; All device banks idle;
CKE = HIGH; Address and other control inputs changing once per clock cycle;
V
Active power-down standby current: One device bank active; Power-
down mode;
Active standby current: CS# = HIGH; CKE = HIGH; One device bank; Active
precharge;
changing twice per clock cycle; Address and other control inputs changing
once per clock cycle
Operating burst read current: BL = 2; Continuous burst reads; One device
bank active; Address and control inputs changing once per clock cycle;
t
Operating burst write current: BL = 2; Continuous burst writes; One
device bank active; Address and control inputs changing once per clock
cycle;
cycle
Auto refresh current
Self refresh current: CKE ≤ 0.2V
Operating bank interleave read current: Four device bank interleaving
reads; BL = 4 with auto precharge;
and control inputs change only during active READ or WRITE commands
DD
CK =
RC =
CK =
IN
= V
Specifications
t
t
t
t
RC (MIN);
CK (MIN); DQ, DM, and DQS inputs changing once per clock cycle;
CK (MIN); I
CK =
REF
for DQ, DQS, and DM
t
RC =
t
CK (MIN); DQ, DM, and DQS inputs changing twice per clock
t
t
I
Values are shown for the MT46V16M8 DDR SDRAM only and are computed from values specified in the
128Mb (16 Meg x 8) component data sheet
CK =
CK =
DD
t
t
CK =
OUT
RAS (MAX);
Specifications and Conditions – 256MB
t
t
Notes:
CK (MIN); CKE = LOW
CK (MIN); CKE = LOW
= 0mA
t
CK (MIN); I
1. Value calculated as one module rank in this operating condition; all other module ranks are
2. Value calculated reflects all module ranks in this operating condition.
t
CK =
in I
OUT
256MB, 512MB, 1GB, 2GB (x72, ECC, DR) 184-Pin DDR SDRAM UDIMM
DD
t
RC =
t
CK (MIN); DQ, DM, and DQS inputs
2P (CKE LOW) mode.
= 0mA; Address and control inputs
t
RC (MIN);
t
t
CK =
RC =
t
t
REFC =
REFC = 15.625µs
t
t
CK (MIN); Address
RC (MIN);
t
CK =
9
t
RFC (MIN)
t
CK (MIN);
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Symbol -40B
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DD
I
I
DD
I
DD
I
I
DD
DD
DD
DD
DD
DD
DD
DD
DD
4W
3N
4R
5A
2P
2F
3P
0
1
5
6
7
1
1
2
2
1
2
2
2
2
1
2
1
1,062 1,152 1,017
1,242 1,242 1,107 1,107
1,242 1,287 1,197 1,152
1,422 1,287 1,152 1,107
4,320 4,770 3,960 3,960
3,222 3,222 2,997 2,952
900
450
900
108
54
72
Electrical Specifications
-335
810
450
900
©2004 Micron Technology, Inc. All rights reserved.
54
90
54
-262
810
450
900
54
90
54
-26A
-265
972
720
360
810
54
90
36
Units
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA