srt512 STMicroelectronics, srt512 Datasheet - Page 15

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srt512

Manufacturer Part Number
srt512
Description
13.56 Mhz Short-range Contactless Memory Chip With 512-bit Eeprom And Anticollision Functions
Manufacturer
STMicroelectronics
Datasheet

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0
SRT512
4.1
4.2
EEPROM area
Blocks 0 to 4 define a User Area. They behave as standard EEPROM blocks, like blocks 7 to
15 as described in
OTP_Lock_Reg bits of the system area. Once a block has been protected, it can no longer
be unprotected.
Figure 12. Lockable EEPROM area (addresses 0 to 4)
32-bit binary counters
The two 32-bit binary counters located at block addresses 5 and 6, respectively, are used to
count down from 2
the update of a counter if the new value is lower than the previous one. This feature allows
the application to count down by steps of 1 or more. The initial value in the counter is
FFFF FFFFh. When the value displayed is 0000 0000h, the counter is empty and cannot be
reloaded. The counter is updated by issuing the WRITE_BLOCK command to block address
5 or 6, depending on which counter is to be updated. The WRITE_BLOCK command writes
the new 32-bit value to the counter block address.
counters operate.
The counter programming cycles are protected by automated antitearing logic. This function
allows the counter value to be protected in case of power down within the programming
cycle. In case of power down, the counter value is not updated and the previous value
continues to be stored.
Blocks 5 and 6 can be write-protected using the OTP_Lock_Reg bits (block 255). Once a
block has been protected, its contents cannot be modified. A protected counter block
behaves like a ROM block.
Figure 13. Binary counter (addresses 5 to 6)
Address
Block
0
1
2
3
4
Block
Address
5
6
MSb
b31
b31
MSb
32
Figure
(4096 million) to 0. The SRT512 uses dedicated logic that only allows
12. Each block can be individually write-protected using the
b16 b15 b14
32-bit Binary Counter
32-bit Binary Counter
32-bit Block
User Area
User Area
User Area
User Area
User Area
b16 b15 b14
32-bit Block
Figure 14
b8 b7
b8 b7
shows examples of how the
LSb
b0
LSb
b0
Memory mapping
Description
EEPROM
Count down
Lockable
Description
Counter
ai12384
ai12382
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