lri64 STMicroelectronics, lri64 Datasheet - Page 14

• Manufacturer Part Number: lri64
• Description: Memory Tag Ic At 13.56 Mhz, With 64-bit Unique Id And Worm User Area, Iso15693 And Iso18000-3 Mode 1 Compliant
• Manufacturer: STMicroelectronics

Communications signal from LRI64 to VCD
8
8.1
8.2
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8.4.1
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Communications signal from LRI64 to VCD
ISO 15693 and ISO 18000-3 Mode 1 standards define several modes, for some parameters,
to cater for use in different application requirements and noise environments. The LRI64
does not support all of these modes, but supports the single subcarrier mode at the fast
data rate.
Load modulation
The LRI64 is capable of communication to the VCD via the inductive coupling between the
two antennas. The carrier is loaded, with a subcarrier with frequency f
switching a load in the LRI64.
The amplitude of the variation to the signal, as received on the VCD antenna, is at least
10mV, when measured as described in the test methods defined in International Standard
ISO10373-7.
Subcarrier
The LRI64 supports the one subcarrier modulation response format. This format is selected
by the VCD using the first bit in the protocol header.
The frequency, f
Data rate
The LRI64 response uses the high data rate format (26.48 kbits/s). The selection of the data
rate is made by the VCD using the second bit in the protocol header.
Bit representation and coding using one subcarrier, at the
high data rate
Data bits are encoded using Manchester coding, as described in
Logic 0
A logic 0 starts with 8 pulses of 423.75 kHz (f
18.88 µs as shown in
Figure 9.
Logic 0, high data rate
S
, of the subcarrier load modulation is 423.75kHz (=f
Figure
9.
37.76 µs
C
/32) followed by an unmodulated period of
AI06663
Figure 9
C
S
/32).
, generated by
and
Figure
LRI64
10.