k4s643232f-tl70 Samsung Semiconductor, Inc., k4s643232f-tl70 Datasheet - Page 11

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k4s643232f-tl70

Manufacturer Part Number
k4s643232f-tl70
Description
Sdram 512k 32bit Banks Synchronous Dram Lvttl
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
K4S643232F
Register Programmed with MRS
POWER UP SEQUENCE
MODE REGISTER FIELD TABLE TO PROGRAM MODES
1. Apply power and start clock. Must maintain CKE= "H", DQM= "H" and the other pins are NOP condition at the inputs.
2. Maintain stable power, stable clock and NOP input condition for a minimum of 200us.
3. Issue precharge commands for all banks of the devices.
4. Issue 2 or more auto-refresh commands.
5. Issue a mode register set command to initialize the mode register.
cf.) Sequence of 4 & 5 is regardless of the order.
The device is now ready for normal operation.
Note : 1. If A
Address
Function
SDRAMs must be powered up and initialized in a predefined manner to prevent undefined operations.
A
A
0
0
1
1
0
1
8
9
2. RFU (Reserved for future use) should stay "0" during MRS cycle.
Write Burst Length
BA
A
0
1
0
1
7
9
0
RFU
Test Mode
is high during MRS cycle, "Burst Read Single Bit Write" function will be enabled.
~ BA
Mode Register Set
Single Bit
Length
1
Burst
Reserved
Reserved
Reserved
A
Type
RFU
10
/AP
W.B.L
A
9
A
0
0
0
0
1
1
1
1
6
A
A
CAS Latency
0
0
1
1
0
0
1
1
8
5
TM
A
0
1
0
1
0
1
0
1
4
A
7
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Latency
2
3
- 11
A
6
CAS Latency
A
0
1
3
Burst Type
A
5
Sequential
Interleave
Type
A
4
A
0
0
0
0
1
1
1
1
2
A
BT
3
A
0
0
1
1
0
0
1
1
Full Page Length : x32 (256)
1
CMOS SDRAM
Rev. 1.0 (Jan. 2002)
A
A
Burst Length
0
1
0
1
0
1
0
1
0
2
Reserved
Reserved
Reserved
Full Page
Burst Length
BT = 0
1
2
4
8
A
1
Reserved
Reserved
Reserved
Reserved
BT = 1
A
1
2
4
8
0

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