k4h560838j Samsung Semiconductor, Inc., k4h560838j Datasheet - Page 10

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k4h560838j

Manufacturer Part Number
k4h560838j
Description
256mb J-die Ddr Sdram Specification
Manufacturer
Samsung Semiconductor, Inc.
Datasheet

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16M x 4Bit x 4 Banks / 8M x 8Bit x 4 Banks / 4M x 16Bit x 4 Banks Double Data Rate SDRAM
9.0 General Description
The K4H560438J / K4H560838J / K4H561638J is 268,435,456 bits of double data rate synchronous DRAM organized as 4x 16,777,216
/ 4x 8,388,608 / 4x 4,194,304 words by 4/8/16bits, fabricated with SAMSUNG′s high performance CMOS technology. Synchronous fea-
tures with Data Strobe allow extremely high performance up to 400Mb/s per pin. I/O transactions are possible on both edges of DQS.
Range of operating frequencies, programmable burst length and programmable latencies allow the device to be useful for a variety of
high performance memory system applications.
10.0 Absolute Maximum Rating
Note : Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded.
11.0 DC Operating Conditions
Note :
1. VREF is expected to be equal to 0.5*VDDQ of the transmitting device, and to track variations in the dc level of same. Peak-to peak noise on VREF may
2. V
3. VID is the magnitude of the difference between the input level on CK and the input level on CK.
4. The ratio of the pullup current to the pulldown current is specified for the same temperature and voltage, over the entire temperature and voltage range,
K4H560438J
K4H560838J
K4H561638J
Supply voltage(for device with a nominal V
Supply voltage(for device with a nominal V
I/O Supply voltage(for device with a nominal V
I/O Supply voltage(for device with a nominal V
I/O Reference voltage
I/O Termination voltage(system)
Input logic high voltage
Input logic low voltage
Input Voltage Level, CK and CK inputs
Input Differential Voltage, CK and CK inputs
V-I Matching: Pullup to Pulldown Current Ratio
Input leakage current
Output leakage current
Output High Current(Normal strengh driver) ;V
Output High Current(Normal strengh driver) ;V
Output High Current(Half strengh driver) ;V
Output High Current(Half strengh driver) ;V
Voltage on any pin relative to V
Voltage on V
Storage temperature
Power dissipation
Short circuit current
not exceed +/-2% of the dc value.
ations in the DC level of VREF
for device drain to source voltages from 0.25V to 1.0V. For a given output, it represents the maximum difference between pullup and pulldown drivers
due to process variation. The full variation in the ratio of the maximum to minimum pullup and pulldown current will not exceed 1.7 for device drain to
source voltages from 0.1 to 1.0.
TT
is not applied directly to the device. V
Functional operation should be restricted to recommend operation condition.
Exposure to higher than recommended voltage for extended periods of time could affect device reliability.
DD
& V
DDQ
Parameter
supply relative to V
SS
Parameter
TT
is a system supply for signal termination resistors, is expected to be set equal to VREF, and must track vari-
DD
DD
SS
OUT
OUT
of 2.5V for DDR266/333)
of 2.6V for DDR400)
DD
DD
OUT
OUT
= V
= V
of 2.5V for DDR266/333)
of 2.5V for DDR400)
= V
TT
= V
TT
Recommended operating conditions(Voltage referenced to V
+ 0.45V
TT
- 0.45V
TT
+ 0.84V
- 0.84V
10 of 24
V
V
Symbol
DD
IN
T
, V
I
P
, V
STG
OS
D
OUT
DDQ
Symbol
VI(Ratio)
V
V
V
V
V
V
V
IH
IN
ID
IL
V
V
V
I
I
I
I
I
DDQ
DDQ
REF
OH
OH
(DC)
OZ
OL
OL
(DC)
(DC)
(DC)
DD
DD
I
TT
I
-55 ~ +150
-0.5 ~ 3.6
-1.0 ~ 3.6
0.49*VDDQ
V
Value
V
REF
1.5
REF
50
-16.8
Min
0.36
0.71
16.8
-0.3
-0.3
2.3
2.5
2.3
2.5
-2
-5
-9
9
+0.15
-0.04
Rev. 1.0 September 2007
0.51*VDDQ
V
V
V
V
V
REF
REF
DDQ
DDQ
DDQ
Max
DDR SDRAM
2.7
2.7
2.7
2.7
1.4
2
5
+0.04
-0.15
+0.3
+0.3
+0.6
SS
=0V, T
Unit
mA
°C
W
V
V
Unit
mA
mA
mA
mA
uA
uA
A
V
V
V
V
V
V
V
V
V
V
-
=0 to 70°C)
Note
1
2
3
4

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