k4s1g0732b Samsung Semiconductor, Inc., k4s1g0732b Datasheet
k4s1g0732b
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k4s1g0732b Summary of contents
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... SDRAM stacked 1Gb B-die (x8) stacked 1Gb B-die SDRAM Specification * Samsung Electronics reserves the right to change products or specification without notice. Revision 1.1 February 2004 CMOS SDRAM Rev. 1.1 February 2004 ...
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... SDRAM stacked 1Gb B-die (x8) Revision History Revision 1.0 (August, 2003) - First release. Revision 1.1 (February, 2004) -Corrected typo. CMOS SDRAM Rev. 1.1 February 2004 ...
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... Cycle) GENERAL DESCRIPTION The K4S1G0732B is 1,073,741,824bits synchronous high data rate Dynamic RAM organized 33,554,432 words by 8 bits, fabri- cated with SAMSUNG's high performance CMOS technology. Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable burst length and programmable latencies allow the same device to be useful for a variety of high bandwidth, high performance memory system applications ...
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... SDRAM stacked 1Gb B-die (x8) Package Physical Dimension #54 #1 0.10 MAX 0.71 FUNCTIONAL BLOCK DIAGRAM CLK,CAS,RAS /WE,DQM /CS1,CKE1 /CS0,CKE0 #28 #27 22.53 MAX 22.22 ± 0.10 0.80 0.25~0.40 54Pin TSOP2 Stack Package Dimension 64Mx8 64Mx8 DQ0 ~ DQ7 CMOS SDRAM Unit : Millimeters 0~8°C 0.25 TYP +0.075 0.125 -0.035 2.54 MAX 0.05 MIN A0~A12,BA0,BA1 Rev. 1.1 February 2004 ...
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... SDRAM stacked 1Gb B-die (x8) PIN CONFIGURATION (Top view) PIN FUNCTION DESCRIPTION Pin Name CLK System clock CS0~1 Chip select CKE0~1 Clock enable Address Bank select address 0 1 RAS Row address strobe CAS Column address strobe WE Write enable DQM ...
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... SDRAM stacked 1Gb B-die (x8) ABSOLUTE MAXIMUM RATINGS Parameter Voltage on any pin relative to Vss Voltage on V supply relative to Vss DD Storage temperature Power dissipation Short circuit current Note : Permanent device damage may occur if "ABSOLUTE MAXIMUM RATINGS" are exceeded. Functional operation should be restricted to recommended operating condition. ...
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... CC3 Operating current I CC4 (Burst mode) Refresh current I CC5 Self refresh current I CC6 Notes : 1. Measured with outputs open. 2. Refresh period is 64ms. 3. K4S1G0732B-TC75 4. Unless otherwise noticed, input swing level is CMOS 70°C) A Test Condition Burst length = 1 ≥ (min ≤ ...
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... SDRAM stacked 1Gb B-die (x8) AC OPERATING TEST CONDITIONS Parameter AC input levels (Vih/Vil) Input timing measurement reference level Input rise and fall time Output timing measurement reference level Output load condition Output 870Ω (Fig output load circuit OPERATING AC PARAMETER (AC operating conditions unless otherwise noted) ...
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... SDRAM stacked 1Gb B-die (x8) AC CHARACTERISTICS (AC operating conditions unless otherwise noted) Parameter CAS latency=3 CLK cycle time CAS latency=2 CAS latency=3 CLK to valid output delay CAS latency=2 CAS latency=3 Output data hold time CAS latency=2 CLK high pulse width CLK low pulse width ...
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... SDRAM stacked 1Gb B-die (x8) IBIS SPECIFICATION I Characteristics (Pull-up) OH 100MHz 100MHz Voltage 133MHz 133Mhz Min Max (V) I (mA) I (mA) 3.45 -2.4 3.3 -27.3 3.0 0.0 -74.1 2.6 -21.1 -129.2 2.4 -34.1 -153.3 2.0 -58.7 -197.0 1.8 -67.3 -226.2 1.65 -73.0 -248.0 1.5 -77.9 -269.7 1.4 -80.8 -284.3 1.0 -88.6 -344.5 0.0 -93.0 -502.4 I Characteristics (Pull-down) OL 100MHz 100MHz Voltage 133MHz 133MHz Min Max (V) I (mA) I (mA) 0.0 0.0 0.0 0.4 27.5 70.2 0.65 41.8 107.5 0.85 51.6 133.8 1.0 58.0 151.2 1.4 70.7 187.7 1 ...
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... SDRAM stacked 1Gb B-die (x8) V Clamp @ CLK, CKE, CS, DQM & (V) I (mA) DD 0.0 0.0 0.2 0.0 0.4 0.0 0.6 0.0 0.7 0.0 0.8 0.0 0.9 0.0 1.0 0.23 1.2 1.34 1.4 3.02 1.6 5.06 1.8 7.35 2.0 9.83 2.2 12.48 2.4 15.30 2.6 18.31 V Clamp @ CLK, CKE, CS, DQM & (V) I (mA) SS -2.6 -57.23 -2.4 -45.77 -2.2 -38.26 -2.0 -31.22 -1.8 -24.58 -1.6 -18.37 -1.4 -12.56 -1.2 -7.57 -1.0 -3.37 -0.9 -1.75 -0.8 -0.58 -0.7 -0.05 -0.6 0.0 -0.4 0.0 -0.2 0.0 0.0 0.0 Minimum V clamp current DD (Referenced Voltage I (mA) Minimum V clamp current -10 -20 -30 -40 -50 ...
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... MRS can be issued only at all banks precharge state. A new command can be issued after 2 CLK cycles of MRS. 3. Auto refresh functions are as same as CBR refresh of DRAM. The automatical precharge without row precharge command is meant by "Auto". Auto/self refresh can be issued only at all banks precharge state. ...