k4t1g084qm-zcd5 Samsung Semiconductor, Inc., k4t1g084qm-zcd5 Datasheet - Page 24

• Manufacturer Part Number: k4t1g084qm-zcd5
• Description: 1gb M-die Ddr2 Sdram Ddr2 Sdram
• Manufacturer: Samsung Semiconductor, Inc.

1Gb M-die DDR2 SDRAM
Specific Notes for dedicated AC parameters
9. User can choose which active power down exit timing to use via MRS(bit 12). tXARD is expected to be
used for fast active power down exit timing. tXARDS is expected to be used for slow active power down exit
timing.
10. AL = Additive Latency
11. This is a minimum requirement. Minimum read to precharge timing is AL + BL/2 providing the tRTP and
tRAS(min) have been satisfied.
12. A minimum of two clocks (2 * tCK) is required irrespective of operating frequency
13. Timings are guaranteed with command/address input slew rate of 1.0 V/ns.
14. These parameters guarantee device behavior, but they are not necessarily tested on each device. They
may be guaranteed by device design or tester correlation.
15. Timings are guaranteed with data, mask, and (DQS/RDQS in singled ended mode) input slew rate of 1.0
V/ns.
16. Timings are guaranteed with CK/CK differential slew rate of 2.0 V/ns. Timings are guaranteed for DQS
signals with a differential slew rate of 2.0 V/ns in differential strobe mode and a slew rate of 1V/ns in single
ended mode.
17. tDS and tDH derating for DDR2-400 and DDR2-533
datasheet tDS(base) and tDH(base) value to the delta tDS and delta tDH derating value respectively. Exam-
ple: tDS (total setup time) = tDS(base) + delta tDS.
For all input signals the total tDS (setup time) and tDH (hold time) required is calculated by adding the
Slew
V/ns
rate
DQ
2.0
1.5
1.0
0.9
0.8
0.7
0.6
0.5
0.4
'tD
125
83
4.0 V/ns
S
0
-
-
-
-
-
-
'tD
45
21
H
0
-
-
-
-
-
-
'tDS, 'tDH Derating Values (ALL units in ‘ps’, Note 1 applies to entire Table)
'tD
125
-11
83
3.0 V/ns
S
0
-
-
-
-
-
'tD
-14
45
21
H
0
-
-
-
-
-
'tD
125
-11
-25
83
2.0 V/ns
S
0
-
-
-
-
'tD
-14
-31
45
21
H
0
-
-
-
-
'tD
-13
-31
DQS,DQS Differential Slew Rate
95
12
1.8 V/ns
S
1
-
-
-
-
Page 24 of 29
'tD
-19
-42
33
12
-2
H
-
-
-
-
'tD
-19
-43
24
13
1.6 V/ns
-1
S
-
-
-
-
'tD
-30
-59
24
10
-7
H
-
-
-
-
'tD
-31
-74
25
11
-7
S
1.4V/ns
-
-
-
-
'tD
-18
-47
-89
22
H
5
-
-
-
-
-127 -140 -115 -128 -103 -116
'tD
-19
-62
23
1.2V/ns
S
5
-
-
-
-
'tD
-35
-77
17
-6
H
-
-
-
-
Rev.1.1 Jan. 2005
'tD
DDR2 SDRAM
-50
17
-7
1.0V/ns
S
-
-
-
-
-
'tD
-23
-65
H
6
-
-
-
-
-
'tD
-38
S
0.8V/ns
5
-
-
-
-
-
-
'tD
-53
-11
H
-
-
-
-
-
-