lrs1331 Sharp Microelectronics of the Americas, lrs1331 Datasheet - Page 5

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lrs1331

Manufacturer Part Number
lrs1331
Description
Stacked Chip Flash Memory Sram
Manufacturer
Sharp Microelectronics of the Americas
Datasheet

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Stacked Chip (16M Flash & 4M SRAM)
NOTES:
1. Commands other than those shown in table are reserved by SHARP for future device
2. BUS operations are defined in Table 2.
3. XA = Any valid address within the device;
4. See Table 4 for Identifier Codes.
5. See Table 5 for Write Protection Alternatives.
6. If the permanent lock-bit is set, Set Block Lock-Bit and Clear Block Lock-Bits commands cannot be done.
7. The clear block lock-bits operation simultaneously clears all block lock-bits.
Data Sheet
Read Array/Reset
Read Identifier Codes
Read Status Register
Clear Status Register
Block Erase
Full Chip Erase
Word Write
Block Erase and Word
Write Suspend
Block Erase and
Write Resume
Set Block Lock-Bits
Clear Block Lock-Bits
Set Permanent Lock-Bits
implementations and should not be used.
IA = Identifier code address;
BA = Address within the block being erased;
WA = Address of memory location to be written;
SRD = Data read from status register;
WD = Data to be written at location WA. Data is latched on the
rising edge of F-WE or F-CE (whichever goes HIGH first);
ID = Data read from identifier codes.
COMMAND
1. DQ
2. BA selects the specific block lock configuration code to be read. See Figure 3
NOTES:
Manufacture Code
Device Code
Block Lock
Configuration
Permanent Lock
Configuration
for the device identifier code memory map.
8
- DQ
15
outputs 00H in word mode. DQ
BUS CYCLES
REQUIRED
CODES
≥ 2
Block is Unlocked
Block is Locked
Device is Unlocked
Device is Locked
1
2
1
2
2
1
1
2
2
2
2
Table 3. Command Definition for Flash Memory
OPERATION
Write
Write
Write
Write
Write
Write
Write
Write
Write
Write
Write
Write
Table 4. Identifier Codes
1
- DQ
FIRST BUS CYCLE
2
7
ADDRESS (A
ADDRESS
are reserved for future use.
WA
XA
XA
XA
XA
XA
XA
XA
BA
XA
BA
XA
00000H
00001H
00003H
00003H
BA + 2
BA + 2
3
40H or 10H
0
DATA
FFH
B0H
D0H
90H
70H
50H
20H
30H
60H
60H
60H
- A
19
3
)
OPERATION
DATA (DQ
Read
Read
Write
Write
Write
Write
Write
Write
DQ
DQ
DQ
DQ
SECOND BUS CYCLE
B0H
E9H
1
0
0
0
0
2
0
= 0
= 1
= 0
= 1
- DQ
ADDRESS
WA
XA
BA
XA
BA
XA
XA
IA
7
)
1
3
NOTES
DATA
SRD
2
2
D0H
D0H
D0H
01H
F1H
WD
ID
3
LRS1331
NOTES
6, 7
4
5
5
5
5
6
5

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