at52br1664at ATMEL Corporation, at52br1664at Datasheet - Page 30

• Manufacturer Part Number: at52br1664at
• Description: 16-megabit Flash 4-megabit Sram Stack Memory
• Manufacturer: ATMEL Corporation

Output Test Load
Note:
Timing Diagrams
Read Cycle 1
Read Cycle 2
Read Cycle 3
Notes:
30
1. Including jig and scope capacitance.
1. Read Cycle occurs whenever a high on the SWE and SOE is low, while SUB and/or SLB and SCS1 and SCS2 are in active
2. SOE = V
3. Transition is measured ± 200 mV from steady state voltage. This parameter is sampled and not 100% tested.
4. SCS1 in high for the standby, low for active. SCS2 in low for the standby, high for active. SUB and SLB in high for the
AT52BR1664A(T)
status.
standby, low for active.
(1),(4)
IL
(1)
(1)
.
,
,
DATA OUT
(2)
(2)
DATA OUT
ADDRESS
SUB, SLB
,
,
(4)
(4)
SCS1
SCS2
DATA OUT
ADDRESS
SUB, SLB
SCS1
SCS2
SOE
HIGH-Z
PREVIOUS DATA
t
CLZ
1029 Ohm
1728 Ohm
(3)
t
OH
t
t
t
t
ACS
CLZ
AA
BLZ
t
t
AA
OLZ
(3)
(3)
(3)
t
BA
2.8V = V
t
ACS
t
OE
t
RC
t
RC
TM
CL
(1)
DATA VALID
DATA VALID
DATA VALID
t
OHZ
t
BHZ
(3)
t
(3)
CHZ
t
OH
(3)
t
CHZ
t
OH
(3)
3361C–STKD–1/04