co561ad-s Connect One Ltd., co561ad-s Datasheet - Page 19

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co561ad-s

Manufacturer Part Number
co561ad-s
Description
The Co561ad-s, Ichip? Internet Controller?, Is Part Of A Family Of Intelligent Peripheral Devices That Provide Internet Connectivity Solutions To A Myriad Of Embedded Devices.
Manufacturer
Connect One Ltd.
Datasheet
11-3500-00
5.2.2 Miscellaneous Signals
Signal
URTINT
MMSEL
-RES
X1
X2
iChip CO561AD-S Datasheet
Type
O
I
I
I
I
Pin no.
40
64
12
42
43
UART Interrupt: This pin is for debugging purpose
only.
This pin should be pulled up to VCC.
Modem Mode Select:
RESET: When -RES is LOW, iChip immediately
terminates its present activity and clears its internal
logic.
-RES must be held LOW for at least 1 ms after power
stabilizes.
iChip begins fetching instructions approximately 6.5
CLKO periods after ~RES going HIGH. This input is
provided with a Schmidt trigger to facilitate power-on
reset generation via an RC network.
Crystal Input: This pin and the X2 pin provide
connections for a fundamental mode or third-overtone,
parallel-resonant crystal used by the internal oscillator
circuit.
To provide iChip with an external clock source,
connect the source to the X1 pin and leave the X2 pin
unconnected.
Crystal Output: This pin and the X1 pin provide
connections for a fundamental mode or third-overtone,
parallel-resonant crystal used by the internal oscillator
circuit.
• When this pin is held LOW during power up for at
• During a firmware update procedure, when an
• When this pin is held LOW during power up for
least 5 seconds, iChip will automatically enter
firmware update mode.
external modem dials to the iChip, pulling this pin
down to LOW will cause the iChip to immediately
answer the call and begin the update session.
less than 5 seconds, it forces the iChip into auto
baud rate detection.
Description
Pin Descriptions
5-4

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