am79m574 ETC-unknow, am79m574 Datasheet - Page 11

• Manufacturer Part Number: am79m574
• Description: Metering Subscriber Line Interface Circuit
• Manufacturer: ETC-unknow

Notes:
1. Unless otherwise noted, test conditions are BAT = –48 V, V
2. Overload level is defined when THD = 1%.
3. Balance return signal is the signal generated at V
4. Not tested in production. This parameter is guaranteed by characterization or correlation to other tests.
5. These tests are performed with a longitudinal impedance of 90 Ω and metallic impedance of 300 Ω for frequencies below
6. This parameter is tested at 1 kHz in production. Performance at other frequencies is guaranteed by characterization.
7. When the SLIC is in the Anti-sat 2 operating region, this parameter is degraded. The exact degradation depends on system
8. "Midpoint" is defined as the connection point between two 300 Ω series resistors connected between A(TIP) and B(RING).
9. Fundamental and harmonics from 256 kHz switch-regulator chopper are not included.
10. Loop-current limit which depends upon the programmed apparent open circuit voltage and the feed resistance is calculated
11. Total harmonic distortion with metering as specified with a metering signal of 2.2 Vrms at the two-wire output, and a transmit
12. Noise with metering is measured by applying a 2.2 Vrms metering signal (measured at the two-wire output) and measuring
13. Tested with 0 Ω source impedance. 2 MΩ is specified for system design purposes only.
14. Assumes the following Z
15. Group delay can be considerably reduced by using a Z
R
(Z
component formulas.)
matches the impedance programmed by Z
12 kHz and 135 Ω for frequencies greater than 12 kHz. These tests are extremely sensitive to circuit board layout.
design. The Anti-sat 2 region occurs at high loop resistances whenV
as follows:
In OHT state:
signal of +3 dBm or receive signal of –4 dBm. The transmit or receive signals are single-frequency inputs, and the distortion
is measured as the highest in-band harmonic at the two-wire or the four-wire output relative to the input signal.
the psophometric noise at the two-wire and four-wire outputs over a 200 ms time interval.
group delay to less than 2 µs. The effect of group delay on linecard performance may be compensated for by using the
QSLAC™ or DSLAC™ devices.
DC1
T
) = 306 kΩ resistive, receive input summing impedance (Z
= R
DC2
Note:
* Logic Low on E0 disables the DET output into the open-collector state.
= 20 kΩ, C
State
I
0
1
2
3
4
5
6
7
LIMIT
DC
T
=
network:
= 0.1 µF, R
0.5
C3 C2 C1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
V
-------------------- -
d
R
apparent
0
1
0
1
0
1
0
1
= 51.1 kΩ, no fuse resistors, two-wire AC output impedance, programming impedance
FEED
VTX
T
.
Table 1. SLIC Decoding
Open Circuit
Ringing
Active
On-hook TX (OHT)
Tip Open
Reserved
Active Polarity Reversal
OHT Polarity Reversal
153 kΩ
TX
Two-Wire Status
SLIC Products
by V
T
In Active state:
RX
56 pF
network such as that shown in Note 14. The network reduces the
. This specification assumes that the two-wire AC load impedance
CC
RX
= +5 V, V
153 kΩ
) = 300 kΩ resistive. (See Table 2 for
BAT
EE
Ring trip
Ring trip
Loop detector
Loop detector
Loop detector
Loop detector
Loop detector
Loop detector
–V
RSN
I
= –5 V, R
LIMIT
E0 = 1*
E1 = 0
AX
=
– V
DET Output
L
0.8
= 600 Ω, C
BX
is less than approximately 17V.
Ring trip
Ring trip
Ground key
Ground key
Ground key
Ground key
V
-------------------- -
R
apparent
FEED
E0 = 1*
E1 = 1
HP
—
—
= 0.22 µF,
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