am79q02 ETC-unknow, am79q02 Datasheet - Page 56

• Manufacturer Part Number: am79q02
• Description: Quad Subscriber Line Audio-processing Circuit Qslac Devices
• Manufacturer: ETC-unknow

PROGRAMMABLE FILTERS
General Description of CSD Coefficients
The filter functions are performed by a series of
multiplications and accumulations. A multiplication
occurs by repeatedly shifting the multiplicand and
summing the result with the previous value at that
summation node. The method used in the QSLAC
device is known as Canonic Signed Digit (CSD)
multiplication and splits each coefficient into a series
of CSD coefficients.
Each programmable FIR filter section has the following
general transfer function:
where the number of taps in the filter = n + 1.
The transfer function for the IIR part of Z and B filters:
The transfer function of the IIR part of the R filter is:
The values of the user-defined coefficients (h
assigned via the MPI. Each of the coefficients (h
defined in the following general equation:
where:
Detailed Description of QSLAC Device Coefficients
The CSD coding scheme in the QSLAC device uses a value called mi, where m1 represents the distance shifted
right of the decimal point for the first binary 1. m2 represents the distance shifted to the right of the previous binary
1, and m3 represents the number of shifts to the right of the second binary 1. Note that the range of values
determined by N is unchanged. Equation 4 is now modified (in the case of N = 4) to:
where:
M
M
M
M
56
HF z ( )
HI z ( )
HI z ( )
h
h
h
h
i
i
i
i
1
2
3
4
=
=
=
=
= m1
= m1 + m2
= m1 + m2 + m3
= m1 + m2 + m3 + m4
B
C1 2
C1 2
B
=
=
=
1
1
2
2
-------------------------------
1 h
-------------------------------
1 h
•
•
h
–
–
M1
0
–
–
m1
1 z
+
–
–
m1
m1
+
+
(
–
(
h
n
n
1
1
B
{
B
+
+
+
z
1 –
1
1
1
2
2
1 –
C1 C
)
)
2
2
+
z
z
–
–
+
–
–
M2
m2
C2 2
1
1
• 2 2
h
2
+
+
z
•
2 –
…
B
•
3
–
+
m2
2
+
–
…
–
m3
B
B
B
B
B
[
(
m1
1
1
2
3
4
N
+
+
+
2
= C1
= C1 • C2
= C1 • C2 • C3
= C1 • C2 • C3 • C4
+
h
–
B
C3 2
m2
MN
n
z
4
2
)
n –
•
+
–
m4
C1 C
–
m3
Am79Q02/021/031 Data Sheet
• 2 C
(
Equation 1
Equation 2
Equation 3
Equation 4
Equation 5
1
+
• 3 2
C4 2
i
) are
•
i
) is
•
–
m4
–
(
m1
)
]
}
+
h
down into a sum of successive values of:
1)
2)
The limit on the negative powers of 2 is determined by
the length of the registers in the ALU.
The coefficient h
N binary 1s in a binary register where the left part
represents whole numbers, the right part decimal
fractions, and a decimal point separates them. The first
binary 1 is shifted M
point; the second binary 1 is shifted M
of the decimal point; the third binary 1 is shifted M
to the right of the decimal point, and so on.
When M
decimal point, that is, no shift. If M
is another binary 1 in front of the decimal point, giving
a total value of binary 10 in front of the decimal point
(i.e., a decimal value of 2.0). The value of N, therefore,
determines the range of values the coefficient h
take (e.g., if N = 3 the maximum and minimum values
are ±3, and if N = 4 the values are between ±4).
m2
i
in Equation 4 represents a decimal number, broken
+
m3
)
Mi = the number of shifts = Mi ≤ Mi + 1
B
N = number of CSD coefficients.
±1.0 multiplied by 2
±1.0 multiplied by 1, or 1/2, or 1/4 … 1/128 …
+
i
1
C1 C2
= sign = ±1
is 0, the value is a binary 1 in front of the
•
i
•
in Equation 4 is a value made up of
C3 C4 2
1
•
bits to the right of the decimal
–0
•
, or 2
–
(
m1
2
+
–1
is also 0, the result
m2
, or 2
2
+
m3
bits to the right
–2
+
m4
Equation 6
Equation 7
… 2
)
–7
3
i
can
bits
…