mt8981dl Mitel, mt8981dl Datasheet - Page 6

• Manufacturer Part Number: mt8981dl
• Description: Iso-cmos St-bus ?amily Digital Switch
• Manufacturer: Mitel

MT8981D
2-22
*If bit 2 of the corresponding Connection High location is 1 or if bit 6 of the Control Register is 1, then these entire
8 bits are output on the channel and stream associated with this location. Otherwise, the bits are used as
indicated to define the source of the connection which is output on the channel and stream associated with this
location.
6-5*
4-0*
BIT
BIT
2
1
0
7
(Unused)
Message
Address
Address
Channel
Channel
Unused
Output
Enable
Stream
NAME
NAME
Bits*
Bits*
ISO-CMOS
When 1, the contents of the corresponding location in Connection Memory Low are
output on the location’s channel and stream. When 0, the contents of the corresponding
location in Connection Memory Low act as an address for the Data Memory and so
determine the source of the connection to the location’s channel and stream.
If the ODE pin is high and bit 6 of the Control Register is 0, then this bit enables the
output driver for the location’s channel and stream. This allows individual channels on
individual streams to be made high-impedance, allowing switching matrices to be
constructed. A 1 enables the driver and a 0 disables it.
Must be a 0.
The number expressed in binary notation on these 2 bits is the number of the ST-BUS
stream for the source of the connection. Bit 6 is the most significant bit. e.g., if bit 6 is 1,
and bit 5 is 0, then the source of the connection is a channel on STi2.
The number expressed in binary notation on these 5 bits is the number of the channel
which is the source of the connection (The ST-BUS stream where the channel lies is
defined by bits 6 and 5.). Bit 4 is the most significant bit. e.g., if bit 4 is 1, bit 3 is 0, bit 2 is
0, bit 1 is 1 and bit 0 is 1, then the source of the connection is channel 19.
(unused)
7
7
7
Figure 5 - Connection Memory High Bits
Figure 6 - Connection Memory Low Bits
No Corresponding Memory
- These bits give 0s if read.
6
6
6
Address
Stream
Bits
5
5
5
4
4
4
3
3
3
DESCRIPTION
DESCRIPTION
Channel
Address
Bits
2
2
2
Per Channel
Control Bits
1
1
1
0
0
0