mt88e45bsr Zarlink Semiconductor, mt88e45bsr Datasheet - Page 27

• Manufacturer Part Number: mt88e45bsr
• Description: 4-wire Calling Number Identification Circuit 2
• Manufacturer: Zarlink Semiconductor

Notes:
1) From TW/P&E/312. Start time: The CPE should enter the signalling state by applying the DC and AC terminations within this time
2) End time: The CPE should leave the signalling state by removing the DC and AC terminations within this time after the end of Data,
3) PWDN and FSKen are internal signals decoded from CB0/1/2.
4) This signal represents the mode of the DR/STD pin.
A/B Wires
TE DC load
TE AC load
after the end of the ring burst.
indicated by CD returning to high. The MT88E45B should also be taken out of FSK mode at this time to prevent the FSK
demodulator from reacting to other in-band signals such as speech, and DTMF tones.
FSKen
Note 3
PWDN
DCLK
DATA
OSC2
Note 3
Note 4
CD
DR
Line Reversal (Optionally sent)
Figure 18 - Application Timing for UK’s CCA Caller Display Service (CDS), e.g., CLIP
Ring Burst
Note 1
250-400ms
A
t
PU
B
Ch. seizure
..101010..
t
Zarlink Semiconductor Inc.
CP
C
MT88E45
27
Mark
D
Note 2
50-150ms
Data
Data
E
t
CA
t
PD
F
A = 200-450 ms
B ≥ 500 ms
C = 80-262 ms
D = 45-262 ms
E ≤ 2.5s (typ. 500 ms)
F >200 ms
Note:
from "CCA Exceptions
Document Issue 3"
First Complete
Ring Cycle
Parameter
Data Sheet
F