ml2251 Oki Semiconductor, ml2251 Datasheet - Page 23

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ml2251

Manufacturer Part Number
ml2251
Description
2-channel Mixing Oki Adpcm Algorithm-based Speech Synthesis Lsi
Manufacturer
Oki Semiconductor
Datasheet
To read the channel status, input “L” level to CS and RD pins. DQ pin will output the channel status in
synchronization with SCK clock.
The selection of rising/falling edge of SCK clock, similar to when inputting the commands and data, is determined
by the level at SCK pin at the falling edge of RD pin.
The status signals in the parallel interface are output to D7 to D0 pins sequentially from D7.
Status Read Timing
OKI Semiconductor
• SCK Rising Edge Operation
• SCK Falling Edge Operation
SCK(I)
SCK(I)
DO(O)
RD (I)
DO(O)
CS (I)
CS (I)
RD (I)
Hi-Z
Hi-Z
D7
D7
D6 D5 D4 D3 D2 D1 D0
D6 D5 D4 D3 D2 D1 D0
Hi-Z
Hi-Z
FEDL2250DIGEST-06
ML2250 family
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