ml2258 Microsemi Corporation, ml2258 Datasheet - Page 4

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ml2258

Manufacturer Part Number
ml2258
Description
Compatible 8-bit Converter With 8-channel Multiplexer
Manufacturer
Microsemi Corporation
Datasheet

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ML2258
ELECTRICAL CHARACTERISTICS
SYMBOL
AC and Dynamic Performance Characteristics (Note 10)
Note 1: Absolute maximum ratings are limits beyond which the life of the integrated circuit may be impaired. All voltages unless otherwise specified are measured with
Note 2: When the input voltage (V
Note 3: –40°C to +85°C operating temperature range devices are 100% tested with temperature limits guaranteed by 100% testing, sampling, or by correlation with worst-
Note 4: Typicals are parametric norm at 25°C.
Note 5: Parameter guaranteed and 100% production tested.
Note 6: Parameter guaranteed. Parameters not 100% tested are not in outgoing quality level calculation.
Note 7: Total unadjusted error includes offset, full scale, linearity, multiplexer and sample and hold errors.
Note 8: For –V
Note 9: Leakage current is measured with the clock not switching.
Note 10: C
Note 11: A 40% to 60% clock duty cycle range insures proper operation at all clock frequencies. In the case that an available clock has a duty cycle outside of these limits,
Note 12: The conversion start setup time requirement only needs to be satisfied if a conversion must be synchronized to a given clock rising edge. If the setup time is not met,
4
t
f
t
SNR
THD
IMD
FR
t
t
t
t
t
t
t
t
t
C
C
ACQ
CLK
C
DC
EOC
WS
SS
WALE
S
H
H1, H0
1H, 0H
IN
OUT
respect to ground.
case test conditions.
one diode drop below ground or one diode drop greater than the V
cause this input diode to conduct — especially at elevated temperatures, and cause errors for analog inputs near full scale. The spec allow 100mV forward bias of either
diode. This means that as long as the analog V
absolute 0V
the minimum time the clock is high or the minimum time the clock is low must be at least 40ns. The maximum time the clock can be high or low is 60µs.
start conversion will have an uncertainty of one clock pulse.
L
= 50pF, timing measured at 50% point.
Signal to Noise Ratio
Sample and Hold Acquisition
Clock Frequency
Conversion Time
Total Harmonic Distortion
Intermodulation Distortion
Frequency Response
Clock Duty Cycle
End of Conversion Delay
Start Pulse Width
Start Pulse Setup Time
Address Latch Enable Pulse Width
Address Setup
Address Hold
Output Enable for DB0–DB7
Output Disable for DB0–DB7
Capacitance of Logic Input
Capacitance of Logic Outputs
REF
• V
DC
IN
to 5V
(+) the digital output code will be 0000 0000. Two on-chip diodes are tied to each analog input which will forward conduct for analog input voltages
PARAMETER
DC
input voltage range will therefore require a minimum supply voltage of 4.900V
IN
) at any pin exceeds the power supply rails (V
IN
or V
NOTES
REF
6, 11
6, 12
5
5
5
5
5
5
5
6
6
6
6
does not exceed the supply voltage by more than 100mV, the output code will be correct. To achieve an
(Continued)
V
f
(f
of all nonfundamental components
up to 1/2 of f
V
f
(f
of 2, 3, 4, 5 harmonics relative to
fundamental
V
f
f
(f
(f
(f
V
to 1kHz
Synchronous only
Figure 1, C
Figure 1, C
Figure 1, C
Figure 1, C
CLK
CLK
B
CLK
SAMPLING
SAMPLING
SAMPLING
A
A
IN
IN
IN
IN
CC
= 47.8kHz, 2.5V sine,
– f
– 2f
IN
= 51kHz, 5V sine.
= 51kHz, 5V sine.
= f
= 0 to 50kHz. 5V sine relative
supply. Be careful, during testing at low V
= 10.24MHz
= 10.24MHz
= 10.24MHz
< V– or V
B
A
), (2f
B
) relative to fundamental
+ f
> 150kHz). IMD is (f
L
L
L
L
CONDITIONS
A
> 150kHz). Noise is sum
> 150kHz). THD is sum
B
IN
. f
= 50pF
= 10pF
= 50pF
= 10pF
SAMPLING
+ f
> V+) the absolute value of current at that pin should be limited to 25mA or less.
A
B
= 49kHz, 2.5V sine.
), (2f
A
– f
B
), (f
DC
A
A
over temperature variations, initial tolerance and loading.
+ 2f
+ f
B
B
CC
),
),
levels (4.5V), as high level analog inputs (5V) can
MIN (NOTE 4)
100
40
50
40
50
50
0
TYP
–60
–60
0.1
67
47
10
4
8
5
67 + 250ns 1/f
8 + 250ns
10240
MAX
100
200
100
60
50
UNITS
1/f
1/f
kHz
dB
dB
dB
dB
pF
pF
%
ns
ns
ns
ns
ns
ns
ns
ns
ns
CLK
CLK
CLK

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