as5045 austriamicrosystems, as5045 Datasheet - Page 21

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as5045

Manufacturer Part Number
as5045
Description
12-bit Programmable Magnetic Rotary Encoder
Manufacturer
austriamicrosystems
Datasheet

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AS5045 12-BIT PROGRAMMABLE MAGNETIC ROTARY ENCODER
15 Timing Characteristics
Synchronous Serial Interface (SSI)
(operating conditions: T
15.1.1
(operating conditions: T
Note: when OTP bit “PWMhalfEn” is set, the PWM pulse width PW is doubled (PWM frequency f
15.2
(operating conditions: T
Revision 1.2, 03-Oct-06
Parameter
Data output activated (logic
high)
First data shifted to output
register
Start of data output
Data output valid
Data output tristate
Pulse width of CSn
Read-out frequency
Parameter
PWM frequency
Minimum pulse width
Maximum pulse width
Parameter
Programming enable time
Write data start
Write data valid
Load Programming data
Rise time of V
Hold time of V
Write data – programming
CLK
CLK pulse width
Hold time of Vprog after
programming
Programming voltage, pin PROG
Programming voltage off level
Programming current
Analog Read CLK
Programmed Zener Voltage (log.1)
Unprogrammed Zener Voltage (log. 0)
PROG
Pulse Width Modulation Output
Programming Conditions
PROG
PROG
before CLK
after CLK
am b
am b
am b
= -40 to +125°C, VDD5V = 3.0-3.6V (3V operation) VDD5V = 4.5-5.5V (5V operation) unless otherwise noted)
= -40 to +125°C, VDD5V = 3.0-3.6V (3V operation) VDD5V = 4.5-5.5V (5V operation) unless otherwise noted)
= -40 to +125°C, VDD5V = 3.0-3.6V (3V operation) VDD5V = 4.5-5.5V (5V operation) unless otherwise noted)
PROG
PROG
Symbol
Symbol
t
t
PW
T
t
PW
t
DO tristate
DO active
f
CLK FE
DO valid
t
f
CLK / 2
CLK
PWM
CSn
t
t
V
t
t
CLK
MAX
Symbol
PROG finished
MIN
V
V
CLK
Prog enable
Data in valid
Load PROG
unprogrammed
V
t
t
programmed
I
t
t
Data in
PROG
ProgOff
PROG
PROG
PrgR
PrgH
PROG
Aread
3891
Min
Min
0.95
500
500
357
500
232
220
>0
www.austriamicrosystems.com
4096
Typ
Typ
375
244
244
Min
250
1.8
7.3
1
2
2
3
0
0
2
0
1
Max
Max
4301
1.05
100
394
100
256
268
1
Typ
7.4
2
Unit
Unit
MHz
Hz
µs
µs
ns
ns
ns
ns
ns
ns
Max
250
130
100
100
2.2
7.5
Note
Time between falling edge of CSn and data output
activated
Time between falling edge of CSn and first falling
edge of CLK
Rising edge of CLK shifts out one bit at a time
Time between rising edge of CLK and data output
valid
After the last bit DO changes back to “tristate”
CSn = high; To initiate read-out of next angular
position
Clock frequency to read out serial data
Note
Signal period = 4097µs ±5% at T
=4097µs ±10% at T
Position 0d; Angle 0 degree
Position 4095d; Angle 359.91 degrees
5
1
Unit
kHz
mA
kHz
mV
µs
µs
µs
µs
µs
µs
µs
ns
V
V
V
Note
Time between rising edge at Prog
pin and rising edge of CSn
Write data at the rising edge of
CLK
ensure that V
rising edge of CLK
during programming; 16 clock
cycles
Programmed data is available after
next power-on
Must be switched off after zapping
Line must be discharged to this
level
during programming
Analog Readback mode
V
Readback mode (see 7.4)
amb
Ref
-V
= -40 to +125°C
PWM
PROG
PROG
is divided by 2)
during Analog
PROG
amb
= 25°C
is stable with
Page 21 of 23

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