micrf507ymltr Micrel Semiconductor, micrf507ymltr Datasheet - Page 24

• Manufacturer Part Number: micrf507ymltr
• Description: 470mhz To 510mhz Low-power Fsk Transceiver With +10dbm Power Amplifier
• Manufacturer: Micrel Semiconductor

Receiver
The receiver is a zero intermediate frequency (ZIF) type
employing low-power, fully integrated low-pass filters.
A low noise amplifier (LNA) drives a quadrature mixer pair.
The mixer outputs feed two identical signal channels.
Each channel’s signal path has a pre-amplifier, a third
order Sallen-Key RC low-pass pre-filter, a six-pole
switched-capacitor
selectivity), and finally a limiter.
The limiter outputs then enter a demodulator which detects
the relative phase of the baseband I and Q signals. If the I
channel signal lags the Q channel, the FSK tone frequency
lies above the LO frequency (data ‘1’). If the I channel
leads the Q channel, then the FSK tone lies below the LO
frequency (data ‘0’). The output of the demodulator is
available on the DATAIXO pin; in either raw form or
latched with the recovered clock according to the setting of
Sync_en bit. An RSSI (receive signal strength indicator)
circuit indicates the received signal level.
Front End
The MICRF507’s low-noise amplifier boosts the incoming
signal prior to frequency conversion in order to prevent
mixer noise from degrading overall front-end noise
performance. The LNA is a two-stage amplifier and has a
nominal gain of approximately 23dB at 490MHz. The front
end has a gain of about 31dB to34dB. The gain varies by
1-1.5dB over a 2.0V to 2.5V variation in power supply.
The LNA can be bypassed by setting bit LNA_by to ‘1’.
This can be useful for very strong input signal levels. The
front-end gain with the LNA bypassed is about 12dB. The
mixers have about 10dB of gain at 490MHz. With
appropriate setting of the OUTS field (register 2, bits D3 to
D0), the differential outputs of the mixers can be made
March 2010
Micrel, Inc.
Field Name
By_LNA
PF_FC
SC_by
ScClk
RSSI_en
FEEC
FEE
filter
Number
of bits
1
2
1
5
1
4
8
(which
Reg21[3:0]
Reg22[7:0]
Reg1[1:0]
Reg8[4:0]
Location
Reg0[7]
Reg2[6]
Reg1[3]
of bits
determines
Table 13. Register Bit Fields for Receiver
Description
LNA bypass on/off
Pre-filter corner frequency
Bypass of switched capacitor filter on/off
Switched Cap clock divider
RSSI function on/off
FEE control bits
FEE value (read only)
actual
24
available at pins IchOut and QchOut. The output
impedance of each mixer is about 8kΩ.
MARKER
1
2
3
Figure 15. LNA Input Impedance
MHz
470
490
510
RESISTANCE
32.4Ω
33.4Ω
34.4Ω
REACTANCE
Reference
Table 14
Table 15
7.9Ω
7.4Ω
6.4Ω
M9999-032210-B
MICRF507