micrf506 Micrel Semiconductor, micrf506 Datasheet

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micrf506

Manufacturer Part Number
micrf506
Description
410mhz And 450mhz Ism Band Transceiver
Manufacturer
Micrel Semiconductor
Datasheet

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General Description
The MICRF506 is a true single-chip, frequency shift keying
(FSK) transceiver intended for use in half-duplex,
bidirectional RF links. The multi-channeled FSK transceiver
is intended for UHF radio equipment in compliance with the
European Telecommunication Standard Institute (ETSI)
specification, EN300 220.
The transmitter consists of a PLL frequency synthesizer
and power amplifier. The frequency synthesizer consists of
a voltage-controlled oscillator (VCO), a crystal oscillator,
dual modulus prescaler, programmable frequency dividers,
and a phase-detector. The loop-filter is external for flexibility
and can be a simple passive circuit. The output power of
the power amplifier can be programmed to seven levels. A
lock-detect circuit detects when the PLL is in lock. In
receive mode, the PLL synthesizer generates the local
oscillator (LO) signal. The N, M, and A values that give the
LO frequency are stored in the N0, M0, and A0 registers.
The receiver is a zero intermediate frequency (IF) type
which makes channel filtering possible with low-power,
integrated low-pass filters. The receiver consists of a low
noise amplifier (LNA) that drives a quadrature mix pair. The
mixer outputs feed two identical signal channels in phase
quadrature. Each channel includes a pre-amplifier, a third
order Sallen-Key RC low-pass filter that protects the
following switched-capacitor filter from strong adjacent
channel signals, and a limiter. The main channel filter is a
switched-capacitor implementation of a six-pole elliptic low
pass filter. The cut-off frequency of the Sallen-Key RC filter
can be programmed to four different frequencies: 100kHz,
150kHz, 230kHz, and 340kHz. The I and Q channel
outputs are demodulated and produce a digital data output.
The demodulator detects the relative phase of the I and the
Q channel signal. If the I channel signal lags behind the Q
channel, the FSK tone frequency is above the LO
frequency (data '1'). If the I channel leads the Q channel,
the FSK tone is below the LO frequency (data '0'). The
output of the receiver is available on the DataIXO pin. A
receive signal strength indicator (RSSI) circuit indicates the
received signal level. All support documentation can be
found on Micrel’s web site at www.micrel.com.
September 2004
1
Features
• True single chip transceiver
• Digital bit synchronizer
• Received signal strength indicator (RSSI)
• RX and TX power management
• Power down function
• Reference crystal tuning capabilities
• Basedband shaping
• Three-wire programmable serial interface
• Register read back function
Applications
• Telemetry
• Remote metering
• Wireless controller
• Remote data repeater
• Remote control systems
• Wireless modem
• Wireless security system
410MHz and 450MHz ISM Band
MICRF506
Transceiver
RadioWire®
(408) 955-1690
M9999-092904

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micrf506 Summary of contents

Page 1

... General Description The MICRF506 is a true single-chip, frequency shift keying (FSK) transceiver intended for use in half-duplex, bidirectional RF links. The multi-channeled FSK transceiver is intended for UHF radio equipment in compliance with the European Telecommunication Standard Institute (ETSI) specification, EN300 220. The transmitter consists of a PLL frequency synthesizer and power amplifier ...

Page 2

... TP1 82k C11 C12 C13 10nF 1nF 1nF MICRF506 – MLF32 2 Modulation Transmit Type 50mA FSK 45mA FSK 28mA FSK 21.5mA FSK Package TM 32-Pin MLF ...

Page 3

... XTALIN I Crystal oscillator input. 24 XTALOUT O Crystal oscillator output. 25 DIGVDD Digital power supply. 26 DIGGND Digital ground. 27 CPOUT O PLL charge pump output. 28 GND Substrate ground. 29 VARIN I VCO varactor. 30 VCOGND VCO ground. 31 VCOVDD VCO power supply connect. M9999-092904 (408) 955-1690 MICRF506 ...

Page 4

... LOAD Over temperature range Over power supply range R = 500, Pa2-0-111 LOAD R = 500, Pa2-0-001 LOAD R = 500, Pa2-0-000 LOAD Birate = 200kbps VCO modulation Divider modulation 4 MICRF506 (2) ) .............................. +2.0V to +2. .................. –40°C to +85° .............................................. 41.7°C 2.5V 25°C, bold DD A Min Typ 410 2 ...

Page 5

... Over temperature Over power supply range 500kHz spacing 1MHz spacing ±1MHz ±2MHz ±5MHz ±10MHz 2 tones with 1MHz separation <1GHz >1GHz 5 MICRF506 Min Typ Max Units 140 kHz 550 kHz 800 kHz -16 dBm -8 dBm <-54 dBm < ...

Page 6

... The device is not guaranteed to function outside its operating rating. 3. Devices are ESD sensitive. Handling precautions recommended. Human body model, 1.5k in series with 100pF. 4. Specification for packaged product only. 5. Guaranteed by design. September 2004 Condition Pin = -110dBm Pin = -60dBm 6 MICRF506 Min Typ Max Units 50 0.9 2 0.7V ...

Page 7

... The MICRF506 will ignore transitions on the SCLK line if the CS line is inactive. The MICRF506 can be put on a bus, sharing clock and data lines with other devices. All control registers should be initiated (written to) following a power-on ...

Page 8

... N1_11 N1_5 N1_4 N1_3 - - M1_11 M1_5 M1_4 M1_3 ‘1’ ‘1’ ‘0’ FEEC_3 FEE_5 FEE_4 FEE_3 Table 1. Control Registers in MICRF506 8 MICRF506 D2 D1 Mode1 Mode0 Load_en LD_en PF_FC1 PF_FC0 OUTS2 OUTS1 OUTS0 VCO_IB0 VCO_freq1 VCO_freq0 Mod_I2 Mod_I1 Mod_I0 Mod_A2 ...

Page 9

... The active state of the CS line is “high.” Use the SCLK/IO serial interface to clock “Address” and “R/W” bit and “Values” into the MICRF506. MICRF506 will sample the IO line at negative edges of SCLK. Make sure to change the state of the IO line before the negative edge. Refer to figures below ...

Page 10

... In addition, n octets with programming bits are entered. Totally octets are clocked into the MICRF506. How to write: In Figure changed at positive edges of SCLK. The MICRF506 samples the IO line at negative edges. The value of the R/W bits is always “0” for writing. CS SCLK IO ...

Page 11

... It is possible to read all registers. The address to read from (or the first address to read from) can be any valid address (0-22). Reading is not destructive, i.e. values are not changed. The IO line is output from the MICRF506 (input to user) for a part of the read-sequence. Refer to procedure description below. A read-sequence is described for reading n registers, where n is number 1-23 ...

Page 12

... Use CS, SCLK, and IO to get access to the control registers in MICRF506. SCLK is user-controlled. Write to the MICRF506 at positive edges (MICRF506 reads at negative edges). Read from the MICRF506 at negative edges (MICRF506 writes at positive edges) After power-on: Write to the complete set of control registers. Address field is 7 bits long. Enter msb first. ...

Page 13

... C10 C11 5.6pF 5.6pF Figure 5. Crystal Oscillator Circuit , specified for the crystal. The load L for the crystal to oscillate parasitic MICRF506 D0 A0_0 N0_8 N0_0 M0_8 M0_0 A1_0 N1_8 N1_0 M1_8 M1_0 Pin 23 XTALIN M9999-092904 (408) 955-1690 ...

Page 14

... Table 8. VCO Bit Setting VCO frequency gain, Vdd=2.5V 480 470 460 450 440 430 420 410 400 390 380 0 0.4 0.8 1.2 1.6 V_varactor [V] Figure 7. RF Frequency vs. Varactor Voltage and VCO Frequency bit (V = 2.25V) DD MICRF506 2.4 M9999-092904 (408) 955-1690 ...

Page 15

... The design of the PLL filter will strongly affect the performance of the frequency synthesizer. The PLL filter is kept externally for flexibility. Input parameters when designing the loop filter for the MICRF506 are mainly the modulation method and the bit rate. These choices will also affect the switching time and phase noise ...

Page 16

... Refclk_K: 6 bit divider, values between 1 and 63 BitRate_clkS: Bit rate setting, values between 0 and 6 Data Interface The MICRF506 interface can be divided in to two separate interfaces, a “programming interface” and a “Data interface”. The “programming interface” has a three wire serial programmable interface and is described in chapter Programming. ...

Page 17

... PF_FC1 17 Figure 12. LNA Input Impedance Modulation0 ‘0’ ‘0’ RSSI_en LD_en PF_FC0 Cut-off Freq. (kHz M9999-092904 (408) 955-1690 MICRF506 D1 D0 PF_FC1 PF_FC0 100 150 230 340 ...

Page 18

... D3 D2 Modulation0 ‘0’ ‘0’ RSSI_en LD_en RSSI 33kohm, 1nF, 125kbps, BW=200kHz, Vdd=2.5V 2.2 2 1.8 1.6 1.4 1.2 1 0.8 0.6 -125 -115 -105 -95 -85 -75 -65 -55 -45 Pin [dBm] Figure 13. RSSI Voltage R2 C10 33k 1nF Figure 14. RSSI Network M9999-092904 (408) 955-1690 MICRF506 D1 D0 PF_FC1 PF_FC0 -35 -25 RSSI ...

Page 19

... XCO frequency should be increased (see ANNEX A) on how to tune the XCO frequency based on the FEE value recommended to use Mode UP+DN for two reasons, you do not need to know the actual frequency deviation and this mode gives the best accuracy. 19 Mode UP+DN: Foffset = R/(4P)x(FEE) (408) 955-1690 MICRF506 M9999-092904 ...

Page 20

... Refclk_K is also used to derive the modulator clock and the bit rate clock. At the beginning of a received data package, the bit synchronizer clock frequency is not synchronized to the bit rate. When these two are maximum offset to each other, it takes 22 bit/symbols before synchronization is achieved. 20 MICRF506 D2 D1 BitSync_clkS1 BitSync_clkS0 RefClk_K2 RefClk_K1 : ...

Page 21

... Not in use Table 11. Modulation Bit Setting baud / baud_min The minimum frequency of the baud baud_min rate (Hz) baud/s: Elements per second (encoded data) Data “0” “1” Table 12. Manchester Encoding MICRF506 D0 Load_en PF_FC0 Word “10” “01” M9999-092904 (408) 955-1690 ...

Page 22

... Temperature (deg C) Figure 17. Open loop leakage Deviation 100 200 300 400 500 600 700 800 -20 -40 -60 -80 -100 -120 Peak-to-peak deviation [kHz] MOD_A=0 MOD_A=1 MOD_A=2 Figure 18. Open loop, frequency offset M9999-092904 (408) 955-1690 MICRF506 80 100 900 ...

Page 23

... When DataIXO is set either high or low, the RF frequency will be shifted up or down, centered around the LO-frequency. This is only important when using the modulator, for the other modulation method, if DataIXO is tristated, the M0-, N0- and A0-registers will be used. 23 MICRF506 M9999-092904 (408) 955-1690 ...

Page 24

... Mod_clkb Mod_clkb > Mod_clka Figure 20. Two Different Modulator Clock Setting of 8 times the bit rate (as in Figure 20) MOD_CLK > Ia Mod Higher current will give a MOD_1 f  DEVIATION f MOD_CLK MOD_I = INT MAX MOD_CLK MICRF506 D0 Mod_I0 Mod_A0 BitRate_clkS2 RefClk_K0 M9999-092904 (408) 955-1690 ...

Page 25

... MOD_CLK f = DEV Where DEV f : XCO Refclk_K: Mod_clkS: f MOD_CLK Mod_I mod_A Mod_A: C1: C2: 25 MICRF506 Mod_filter on Filtering f XCO = (7 Mod_clkS ) Refclk_K  2 Mod_I Mod_A MOD_CLK Single sided frequency deviation [Hz] Crystal oscillator frequency [Hz] Center frequency [Hz] 6 bit divider, values between 1 ...

Page 26

... OFFSET A procedure for using the XCOtuning feature in combination with the FEE is given below. The MICRF506 measures the frequency offset between the demodulated signal and the Lo and tune the XCO so the Lo frequency is equal to received carrier frequency. A procedure like this can be called during production ...

Page 27

... Program RFChip September 2004 Delay > n bits Read FEE FEE > 0? Yes --> XCO_Sign = POS No --> XCO_Sing = NEG // negative XCO_Step > 1? Yes --> Branch to LOOP No --> XCO_Sing ==POS? Branch to FIN FIN: RETURN, return-value = XCO_Present POS or NEG 27 MICRF506 Yes --> XCO_Present M9999-092904 (408) 955-1690 ...

Page 28

... A Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser’s own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale. September 2004 32-Pin MLF (B) © 2004 Micrel, Incorporated. 28 MICRF506 M9999-092904 (408) 955-1690 ...

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