ht82k96e Holtek Semiconductor Inc., ht82k96e Datasheet - Page 21

• Manufacturer Part Number: ht82k96e
• Description: Ht82k96e -- Usb Multimedia Keyboard Encoder 8-bit Otp Mcu
• Manufacturer: Holtek Semiconductor Inc.

SIES. Register (for version C or later version) is used to indicate the present signal state which the SIE receives and
also defines whether the SIE has to change the device address automatically.
Note: Bit7 must be 0
MISC register combines a command and status to control desired endpoint FIFO action and to show the status of
wanted endpoint FIFO. The MISC will be cleared by USB reset signal.
Rev. 2.00
Func.
R/W
Reg_Adr
Func. Name
Bit No.
F0_Err
0
1
2
4
3
5
6
7
READY
CLEAR
SELP1
SELP0
SCMD
Label
LEN0
REQ
TX
Bit7
R/W
R/W
R/W
R/W
R/W
R/W
R/W Clear the requested endpoint FIFO, even the endpoint FIFO is not ready.
R/W
R/W
R/W
R
This bit is used to configure the SIE to automatically change the device address with
the value of the Address+Remote_WakeUp Register (42H).
When this bit is set to 1 by F/W, the SIE will update the device address with the value
of the Address+Remote_WakeUp Register (42H) after the PC Host has successfully
read the data from the device by the IN operation. The SIE will clear the bit after updat-
ing the device address. Otherwise, when this bit is cleared to 0 , the SIE will update
the device address immediately after an address is written to the Address+Re-
mote_WakeUp Register (42H)
Default 0
This bit is used to indicate that some errors have occurred when accessing the FIFO0.
This bit is set by SIE and cleared by F/W.
Default 0
After setting other status of desired one in the MISC, endpoint FIFO can be requested
by setting this bit to 1 . After job has been done, this bit has to be cleared to 0
This bit defines the direction of data transferring between MCU and endpoint FIFO.
When the TX is set to 1 , this means that MCU wants to write data to endpoint FIFO.
After the job has been done, this bit has to be cleared to 0 before terminating re-
quest to represent end of transferring. For reading action, this bit has to be cleared to
To define which endpoint FIFO is selected, SELP1,SELP0:
00: endpoint FIFO0
01: endpoint FIFO1
10: endpoint FIFO2
11: endpoint FIFO3
It is used to show that the data in endpoint FIFO is SETUP command. This bit has to
be cleared by firmware. That is to say, even the MCU is busing, the device will not
miss any SETUP commands from host.
Read only status bit, this bit is used to indicate that the desired endpoint FIFO is ready
to work.
It is used to indicate that a 0-sized packet is sent from host to MCU. This bit should be
cleared by firmware.
Bit6
0 to represent that MCU wants to read data from endpoint FIFO and has to be set to
1 after the job done.
SIES (45H) Register Table
Bit5
Reserved bit
MISC (46H) Register
21
Bit4
01000101B
Description
Function
Bit3
Bit2
F0_ERR
Bit1
R/W
October 11, 2007
HT82K96E
Adr_set
R/W
Bit0