ht82k74e Holtek Semiconductor Inc., ht82k74e Datasheet - Page 16

• Manufacturer Part Number: ht82k74e
• Description: 27mhz Keyboard/ Mouse Tx 8-bit Mcu
• Manufacturer: Holtek Semiconductor Inc.

Device Addressing
All EEPROM devices require an 8-bit device address
word following a start condition to enable the EEPROM
for read or write operations. The device address word
consist of a mandatory one, zero sequence for the first
four most significant bits. Refer to the diagram showing
the Device Address. This is common to all the EEPROM
devices. The next three bits are all zero bits.
The 8th bit of device address is the read/write operation
select bit. A read operation is initiated if this bit is high
and a write operation is initiated if this bit is low.
If the comparison of the device address is successful then
the EEPROM will output a zero as an ACK bit. If not, the
EEPROM will return to a standby state.
Rev. 1.00
Start condition
A high-to-low transition of SDA with SCL high will be
interpreted as a start condition which must precede
any other command - refer to the Start and Stop Defi-
nition Timing diagram.
Stop condition
A low-to-high transition of SDA with SCL high will be
interpreted as a stop condition. After a read se-
quence, the stop command will place the EEPROM in
a standby power mode - refer to Start and Stop Defini-
tion Timing Diagram.
Acknowledge
All addresses and data words are serially transmitted
to and from the EEPROM in 8-bit words. The
EEPROM sends a zero to acknowledge that it has re-
ceived each word. This happens during the ninth clock
cycle.
16
Write Operations
Byte write
A write operation requires an 8-bit data word address
following the device address word and acknowledg-
ment. Upon receipt of this address, the EEPROM will
again respond with a zero and then clock in the first
8-bit data word. After receiving the 8-bit data word, the
EEPROM will output a zero and the addressing de-
vice, must terminate the write sequence with a stop
condition. At this time the EEPROM enters an inter-
nally-timed write cycle to the non-volatile memory. All
inputs are disabled during this write cycle and
EEPROM will not respond until the write cycle is com-
pleted. Refer to Byte write timing diagram.
Acknowledge polling
To maximise bus throughput, one technique is to allow
the master to poll for an acknowledge signal after the
start condition and the control byte for a write com-
mand have been sent. If the device is still busy imple-
menting its write cycle, then no ACK will be returned.
The master can send the next read/write command
when the ACK signal has finally been received.
Read operations
The data EEPROM supports three read operations,
namely, current address read, random address read
and sequential read. During read operation execution,
the read/write select bit should be set to 1 .
Current address read
The internal data word address counter maintains the
last address accessed during the last read or write op-
eration, incremented by one. This address stays valid
between operations as long as the EEPROM power is
maintained. The address will roll over during a read
from the last byte of the last memory page to the first
byte of the first page. Once the device address with
the read/write select bit set to one is clocked in and ac-
knowledged by the EEPROM, the current address
data word is serially clocked out. The microcontroller
should respond a No ACK - High - signal and a follow-
ing stop condition - refer to Current read timing.
Acknowledge Polling Flow
HT82K74E/HT82K74EE
December 15, 2009