ht82k73e Holtek Semiconductor Inc., ht82k73e Datasheet - Page 16

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ht82k73e

Manufacturer Part Number
ht82k73e
Description
2.4ghz Keyboard Tx 8-bit Otp Mcu
Manufacturer
Holtek Semiconductor Inc.
Datasheet
Configuring the Timer Mode
In this mode, the timer can be utilised to measure fixed
time intervals, providing an internal interrupt signal each
time the counter overflows. To operate in this mode, bits
TM1 and TM0 of the TMRC register must be set to 1 and
0 respectively. In this mode, the internal clock is used as
the timer clock. The timer-on bit, TON, must be set high
to enable the timer to run. Each time an internal clock
high to low transition occurs, the timer increments by
one. When the timer is full and overflows, the timer will
be reset to the value already loaded into the preload reg-
ister and continue counting. If the timer interrupt is en-
abled, an interrupt signal will also be generated. The
timer interrupt can be disabled by ensuring that the ETI
bit in the INTC register is cleared to zero.
Configuring the Event Counter Mode
In this mode, a number of externally changing logic
events, occurring on external pin PA2/TMR, can be re-
corded by the internal timer. For the timer to operate in
the event counting mode, bits TM1 and TM0 of the
TMRC register must be set to 0 and 1 respectively. The
timer-on bit, TON must be set high to enable the timer to
count. With TE low, the counter will increment each time
the PA2/TMR pin receives a low to high transition. If the
TE bit is high, the counter will increment each time
PA2/TMR receives a high to low transition. As in the
case of the other two modes, when the counter is full
and overflows, the timer will be reset to the value al-
ready loaded into the preload register and continue
counting. If the timer interrupt is enabled, an interrupt
Rev. 1.00
Pulse Width Measure Mode Timing Chart
Event Counter Mode Timing Chart
Timer Mode Timing Chart
16
signal will also be generated. The timer interrupt can be
disabled by ensuring that the ETI bit in the INTC register
is cleared to zero. To ensure that the external pin
PA2/TMR is configured to operate as an event counter
input pin, two things have to happen. The first is to en-
sure that the TM0 and TM1 bits place the timer/event
counter in the event counting mode, the second is to en-
sure that the port control register configures the pin as
an input. It should be noted that a timer overflow. In the
Event Counting mode, the Timer/Event Counter will
continue to record externally changing logic events on
the timer input pin. As a result when the timer overflows
and if the interrupts are enabled also generate a timer
interrupt signal.
Configuring the Pulse Width Measurement Mode
In this mode, the width of external pulses applied to the
pin-shared external pin PA2/TMR can be measured. In
the Pulse Width Measurement Mode, the timer clock
source is supplied by the internal clock. For the timer to
operate in this mode, bits TM0 and TM1 must both be
set high. If the TE bit is low, once a high to low transition
has been received on the PA2/TMR pin, the timer will
start counting until the PA2/TMR pin returns to its origi-
nal high level. At this point the TON bit will be automati-
cally reset to zero and the timer will stop counting. If the
TE bit is high, the timer will begin counting counting
once a low to high transition has been received on the
PA2/TMR pin and stop counting when the PA2/TMR pin
returns to its original low level. As before, the TON bit
will be automatically reset to zero and the timer will stop
HT82K73E
April 16, 2008

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