ht82m72e Holtek Semiconductor Inc., ht82m72e Datasheet - Page 12

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ht82m72e

Manufacturer Part Number
ht82m72e
Description
Ht82m72e/ht82m72a -- Rf One Channel Mouse 8-bit Otp Mcu
Manufacturer
Holtek Semiconductor Inc.
Datasheet

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Port Pin Wake-up
If the HALT instruction is executed, the device will enter
the Power Down Mode, where the system clock will stop
resulting in power being conserved, a feature that is im-
portant for battery and other low-power applications.
Various methods exist to wake-up the microcontroller,
one of which is to change the logic condition on one of
the port pins from high to low. After a HALT instruction
forces the microcontroller into entering the Power Down
Mode, the processor will remain in a low-power state un-
til the logic condition of the selected wake-up pin on the
port pin changes from high to low. This function is espe-
cially suitable for applications that can be woken up via
external switches. Note that each pin on Port A can be
selected individually to have this wake-up feature and
PA4~PA5 both falling and rising edge wake-up function.
I/O Port Control Registers
Each I/O port has its own control register PAC,
PBC0~PBC6 and PDC0~PDC1, to control the input/out-
put configuration. With this control register, each CMOS
output or input with or without pull-high resistor struc-
tures can be reconfigured dynamically under software
control. Each of the I/O ports is directly mapped to a bit
in its associated port control register.
For the I/O pin to function as an input, the corresponding
bit of the control register must be written as a 1 . This
will then allow the logic state of the input pin to be di-
rectly read by instructions. When the corresponding bit
of the control register is written as a 0 , the I/O pin will
be setup as a CMOS output. If the pin is currently setup
as an output, instructions can still be used to read the
output register. However, it should be noted that the pro-
gram will in fact only read the status of the output data
latch and not the actual logic status of the output pin.
Rev. 1.20
Input/Output Ports
12
Pin-shared Functions
The flexibility of the microcontroller range is greatly en-
hanced by the use of pins that have more than one func-
tion. Limited numbers of pins can force serious design
constraints on designers but by supplying pins with
multi-functions, many of these difficulties can be over-
come. For some pins, the chosen function of the
multi-function I/O pins is set by configuration options
while for others the function is set by application pro-
gram control.
I/O Pin Structures
The diagrams illustrate the I/O pin internal structures. As
the exact logical construction of the I/O pin may differ
from these drawings, they are supplied as a guide only
to assist with the functional understanding of the I/O
pins.
External Timer Clock Input
The external timer pin TMR is pin-shared with the I/O
pin PA2. To configure this pin to operate as timer input,
the corresponding control bits in the timer control reg-
ister must be correctly set. For applications that do not
require an external timer input, this pin can be used as
a normal I/O pin. Note that if used as a normal I/O pin
the timer mode control bits in the timer control register
must select the timer mode, which has an internal
clock source, to prevent the input pin from interfering
with the timer operation.
The Z1/Z2 is for Z_axis Function
The Z1/Z2 pins are pin shared with the PA4/PA5 pins.
PA4, PA5 has falling and rising edge wake-up func-
tion, if it select can wake-up by OTP option. In halt
mode if PA4 wake-up the PC6 [16H] will be set, if PA5
wake-up the PC7 [16H] will be set.
If user read PC6 or PC7, the bit will be clear.
HT82M72E/HT82M72A
May 22, 2008

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