adum5401w Analog Devices, Inc., adum5401w Datasheet - Page 19

• Manufacturer Part Number: adum5401w
• Description: Quad-channel Isolators With Integrated Dc-to-dc Converter
• Manufacturer: Analog Devices, Inc.

V
An issue with reliable startup has been identified in the
ADuM5401W/5402W/5403W components. It is related to
initialization of the band gap voltage references on the primary
(power input) and secondary (power output) sides of the isoPower
device and are being addressed in future revisions of the silicon.
For current versions of the silicon, the user must follow these
design guidelines to guarantee proper operation of the device.
The band gap voltage references are vulnerable to slow power-
up slew rate. The susceptibility to power-up errors is process
sensitive so not all devices display these behaviors. These
recommendations should be implemented for all designs until
the corrections are made to the silicon. The symptoms and
corrective actions required for issues with the primary and
secondary side startup are different.
Symptom
The V
3.4 V and 4.7 V when power is removed at V
between 250 ms and 3 sec later. The error only occurs on restart, it
does not occur at initial power-up. If the part initializes incorrectly,
power must be remove for an extended time to allow internal
nodes to discharge and reset. The amount of time required can
be several minutes at low temperature; therefore, it is critical to
avoid allowing the device to initialize improperly.
Cause
The secondary side band gap reference does not initialize to the
proper voltage due to a slow slew rate on V
nodes are precharged during the previous power cycle. The
secondary side band gap sets the output voltage of the regulator.
ISO
STARTUP ISSUES
ISO
output voltage restarts to an incorrect voltage between
DD1
ISO
and then reapplied
after the internal
Rev. 0 | Page 19 of 20
Solution
The slew rate of V
load present on the output. Designs that attempt to reduce ripple
by adding capacitance to the V
enough to see startup errors. Choose values for bulk capacitance
based on the effective dc load. Calculate the dc load as the resistive
equivalent to the current drawn from the V
the range of allowable capacitance for the V
Figure 28. Choose the bulk capacitance for V
applications required ripple, unless the value is in the disallowed
combinations area, then the value has to be reduced to avoid
restart issues.
ADuM5401W/ADuM5402W/ADuM5403W
100k
10k
100
1k
10
1
Figure 28. Maximum Capacitive Load for Proper Restart
1
ISO
is determined by the resistive and capacitive
10
C
ISO
VISO
output can slow the slew rate
(µF)
COMBINATIONS
DISALLOWED
100
ISO
ISO
ISO
line. Determine
output from
to achieve the
1k