tsl2580 ETC-unknow, tsl2580 Datasheet - Page 16

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tsl2580

Manufacturer Part Number
tsl2580
Description
Light-to-digital Converter
Manufacturer
ETC-unknow
Datasheet
TSL2580, TSL2581
LIGHT-TO-DIGITAL CONVERTER
TAOS098 − MARCH 2010
Interrupt Threshold Register (03h − 06h)
NOTE: Since two 8-bit values are combined for a single 16-bit value for each of the high and low interrupt thresholds, the Send Byte protocol should
Analog Register (07h)
16
Copyright E 2010, TAOS Inc.
FIELD
Address
Resv
Gain
Gain
The interrupt threshold registers store the values to be used as the high and low trigger points for the comparison
function for interrupt generation. If the value generated by channel 0 crosses below or is equal to the low
threshold specified, an interrupt is asserted on the interrupt pin. If the value generated by channel 0 crosses
above the high threshold specified, an interrupt is asserted on the interrupt pin. Registers THLLOW and
THLHIGH provide the low byte and high byte, respectively, of the lower interrupt threshold. Registers THHLOW
and THHHIGH provide the low and high bytes, respectively, of the upper interrupt threshold. The high and low
bytes from each set of registers are combined to form a 16-bit threshold value. The interrupt threshold registers
default to 00h on power up.
The ANALOG register provides eight bits of control to the analog block. These bits control the analog gain
settings of the device.
07h
not be used to write to these registers. Any values transferred by the Send Byte protocol with the MSB set would be interpreted as the
COMMAND field and stored as an address for subsequent read/write operations and not as the interrupt threshold information as desired.
The Write Word protocol should be used to write byte-paired registers. For example, the THLLOW and THLHIGH registers (as well as
the THHLOW and THHHIGH registers) can be written together to set the 16-bit ADC value in a single transaction.
Bit :
BITS
REGISTER
THHHIGH
THLHIGH
7:3
2:0
2:0
THHLOW
THLLOW
7
Reserved. Write as 0.
Gain Control. Sets the analog gain of the device according to the following table.
6
ADDRESS
Table 9. Interrupt Threshold Register
RESV
3h
4h
5h
6h
5
FIELD VALUE
r
Table 10. Analog Register
x00
x01
x10
x11
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BITS
7:0
7:0
7:0
7:0
4
ADC channel 0 lower byte of the low threshold
ADC channel 0 upper byte of the low threshold
ADC channel 0 lower byte of the high threshold
ADC channel 0 upper byte of the high threshold
3
DESCRIPTION
2
DESCRIPTION
r
GAIN
1
GAIN VALUE
The LUMENOLOGY r Company
111
16
1
8
×
×
×
×
0
Reset
00h

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