sc16c850iet NXP Semiconductors, sc16c850iet Datasheet - Page 7

• Manufacturer Part Number: sc16c850iet
• Description: Sc16c850 2.5 V To 3.3 V Uart, 5 Mbit/s Max. With 128-byte Fifos, Infrared Irda , And 16 Mode Or 68 Mode Parallel Bus Interface
• Manufacturer: NXP Semiconductors

NXP Semiconductors
Table 2.
SC16C850_1
Product data sheet
Symbol
D0
D1
D2
D3
D4
D5
D6
D7
INT
(IRQ)
INT
IOR
(V
IOR
IOW
(R/W)
IOW
LOWPWR B5
RESET
(RESET)
RESET
RI
DD
)
Pin description
Pin
TFBGA36 HVQFN32
F4
E4
F5
E5
F6
E6
D6
D5
-
D1
-
A3
-
B4
-
F1
F3
29
30
31
32
1
3
4
5
20
-
14
-
12
-
9
23
-
27
…continued
Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
I
I
I
I
I
I
I
I
2.5 V to 3.3 V UART with 128-byte FIFOs and IrDA encoder/decoder
Description
Data bus (bidirectional). These pins are the 8-bit, 3-state data bus for
transferring information to or from the controlling CPU. D0 is the least
significant bit and the first data bit in a transmit or receive serial data stream.
When 16/68 pin is at logic 1 or unconnected, this output becomes active HIGH
interrupt output. The output state is defined by the user through the software
setting of MCR[5]. INT is set to the active mode when MCR[5] is set to a
logic 1. INT is set to the open-source mode when MCR[5] is set to a logic 0.
When 16/68 pin is at logic 0, this output becomes device interrupt output
(active LOW, open-drain). An external pull-up resistor to V
Interrupt output (active HIGH). The output state is defined by the user
through the software setting of MCR[5]. INT is set to the active mode when
MCR[5] is set to a logic 1. INT is set to the open-source mode when MCR[5] is
set to a logic 0.
When 16/68 pin is at logic 1, this input becomes the read strobe (active LOW).
When 16/68 pin is at logic 0, this input pin is not used and should be
connected to V
Read strobe (active LOW).
When 16/68 pin is at logic 1 or unconnected, this input becomes the write
strobe (active LOW).
When 16/68 pin is at logic 0, this input becomes read strobe when it is at logic
HIGH, and write strobe when it is at logic LOW.
Write strobe (active LOW).
Low Power. When asserted (active HIGH), the device immediately goes into
low power mode. The oscillator is shut-off and some host interface pins are
isolated from the host’s bus to reduce power consumption. The device only
returns to normal mode when the LOWPWR pin is de-asserted. On the
negative edge of a de-asserting LOWPWR signal, the device is automatically
reset and all registers return to their default reset states. This pin has an
internal pull-down resistor, therefore, it can be left unconnected (refer to
Section 6.12 “Low power
Master Reset. When 16/68 pin is at logic 1 or unconnected, this input
becomes the RESET pin (active HIGH).
When 16/68 pin is at logic LOW, this input pin becomes RESET (active LOW).
(See
initialization details.)
Reset input (active HIGH). See
condition and software reset”
Ring Indicator (active LOW). A logic 0 on this pin indicates the modem has
received a ringing signal from the telephone line. A logic 1 transition on this
input pin will generate an interrupt if modem status interrupt is enabled. Status
can be tested by reading MCR[6].
Rev. 01 — 10 January 2008
Section 7.23 “SC16C850 external reset condition and software reset”
DD
.
feature”).
for initialization details.
Section 7.23 “SC16C850 external reset
SC16C850
DD
© NXP B.V. 2008. All rights reserved.
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