bd00hc5wefj ROHM Co. Ltd., bd00hc5wefj Datasheet - Page 6

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bd00hc5wefj

Manufacturer Part Number
bd00hc5wefj
Description
1.5a Secondary Variable Output Ldo Regulators For Local Power Supplies
Manufacturer
ROHM Co. Ltd.
Datasheet

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●Heat Loss
●About equivalent series resistance ESR (ceramic capacitor etc.)
© 2010 ROHM Co., Ltd. All rights reserved.
BD00HC5WEFJ
Capacitor usually has ESR(Equivalent Series Resistance), and
www.rohm.com
operates stable in ESR-OUT range, showed right. Generally, ESR of
ceramic, tantalum and electronic capacitor etc. is different for each,
so please be sure to check a capacitor which is going to use, and use
it inside the stable range, showed right. Then, please evaluate for the
actual application.
Thermal design should allow operation within the following conditions. Note that the temperatures listed are the allowed
temperature limits, and thermal design should allow sufficient margin from the limits.
Chip junction temperature can be determined as follows:
Most of the heat loss that occurs in the BD00HC5WEFJ is generated from the output Pch FET. Power loss is determined by
the total V
conditions in relation to the heat dissipation characteristics of the V
dissipation may vary substantially depending on the substrate employed (due to the power package incorporated in the
BD00HC5WEFJ make certain to factor conditions such as substrate size into the thermal design.
1. Ambient temperature Ta can be no higher than 85℃.
2. Chip junction temperature (Tj) can be no higher than 150℃.
① Calculation based on ambient temperature (Ta)
Tj=Ta+θj-a×W
<Reference values>
cc
Example) Where VCC=5.0V, VO=3.3V, Io(Ave) = 0.5A,
-Vo voltage and output current. Be sure to confirm the system input and output voltage and the output current
Power consumption (W) = Input voltage (VCC)- Output voltage (Vo) ×Io(Ave)
Power consumption (W) = 5.0(V)-3.3(V) ×0.5(A)
θj-a: HTSOP-J8 153.2℃/W
=0.85(W)
113.6℃/W
Substrate size: 70×70×1.6mm
59.2℃/W
33.3℃/W
1-layer substrate (copper foil density 0mm×0mm)
2-layer substrate (copper foil density 15mm×15mm)
2-layer substrate (copper foil density 70mm×70mm)
4-layer substrate (copper foil density 70mm×70mm)
6/11
IN
3
and Vo in the design. Bearing in mind that heat
(substrate with thermal via)
0.01
100
0.1
10
1
0
Stable area characteristics
(Characteristics example)
Capacity-Bias characteristics
50
IOUT [mA]
100
Technical Note
2010.04 - Rev.A
150
200

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