x40031v14z-bt1 Intersil Corporation, x40031v14z-bt1 Datasheet - Page 19

• Manufacturer Part Number: x40031v14z-bt1
• Description: Triple Voltage Monitor With Integrated Cpu Supervisor
• Manufacturer: Intersil Corporation

TIMING DIAGRAMS
Bus Timing
WP Pin Timing
Write Cycle Timing
Nonvolatile Write Cycle Timing
Note:
Symbol
SDA OUT
t
(1) t
WC
SDA IN
SDA
the minimum cycle time to be allowed for any nonvolatile write by the user, unless Acknowledge Polling is used.
SCL
SCL
(1)
WC
is the time from a valid stop condition at the end of a write sequence to the end of the self-timed internal nonvolatile write cycle. It is
t
SU:STA
SDA IN
SCL
WP
8
th
Bit of Last Byte
19
t
HD:STA
START
t
F
Write Cycle Time
t
SU:WP
Parameter
X40030, X40031, X40034, X40035
t
SU:DAT
t
Clk 1
HIGH
ACK
t
Slave Address Byte
LOW
t
HD:DAT
Condition
Stop
Min.
t
R
t
AA
Clk 9
t
HD:WP
t
WC
t
DH
Typ.
5
Condition
Start
t
Max.
BUF
10
t
SU:STO
Unit
May 25, 2006
ms
FN8114.1