tc9457f TOSHIBA Semiconductor CORPORATION, tc9457f Datasheet - Page 6

• Manufacturer Part Number: tc9457f
• Description: Firmware Built In Digital Servo
• Manufacturer: TOSHIBA Semiconductor CORPORATION

Pin No.
26~28
33~38
39~42
25
29
30
31
32
43
44
P3-0/DCREF
P4-0/ADIN4/
COFS/OT22
P4-2/S0/SI1
SPCK/OT20
SPDA/OT21
P3-1/ADIN1
P3-3/ADIN3
/HSO/OT19
P4-3/SCK
P4-1/S12
Symbol
TEST0
TEST5
BUZR
DOUT
SBSY
/SDA
/SCL
~
~
/Buzzer output
voltage inputs
signal outputs
control inputs
voltage input
voltage input
input/outputs
/output ports
input /output
/Serial clock
input /output
/Serial data
/Serial data
/AD analog
/AD analog
/AD analog
Test mode
CD control
CD control
Pin Name
I/O port 3
reference
I/O port 3
I/O port 4
I/O port 4
input
5-bit CMOS I/O ports.
These ports can be set for input or output bit for bit by a
program.
The P3-0 to P4-0 pins serve dual purposes as analog
inputs for the internal 6-bit 4-channel AD converters.
The internal AD converters can complete conversion in 6
instruction cycles using a successive approximation
method. The required pins can be set for AD analog input
bit for bit by a program. P3-0 can be set for reference
voltage input, and the internal power supply (MV
be used for this reference voltage.
The P4-0 pin serves dual purposes as a buzzer output
pin.
The buzzer output can be selected from 8 frequencies,
0.625 to 3 kHz. Each selected frequency can be output in
one of four modes: continuous, single, 10 Hz intermittent,
and 10 Hz intermittent at 1 Hz interval.
Whether or not to use and how to control the AD converter
and buzzer all can be set by a program.
Note 2: If P3-0 is set for reference voltage input, note that
3-bit CMOS I/O ports.
These ports can be set for input or output bit for bit by a
program.
These pins serve dual purposes as input or output pins for
the serial interface circuit (SI0).
The SI0 is a 2-wire/3-wire compatible serial interface.
4 or 8 bits of serial data, beginning with the MSB or LSB,
are serially output from the SO/SDA pin at each clock
edge on the SCK/SCL pin, and the data on SI1 or SI2 pin
is serially input to the device. The serial clock (SCK/SCL)
allows selection between the internal (450/225/150/75
kHz) and external sources and a selection of the active
edge, rise or fall. Moreover, since the clock and data can
be output via Nch open-drain outputs, various device
controls and communication between controllers can be
greatly facilitated.
When an SI0 interrupt is enabled, an interrupt is
generated at completion of SI0 execution and the program
jumps to address 4. This is effective when high-speed
serial communication is desired.
All inputs to SI0 contain a Schmitt trigger circuit.
Whether or not to use SI0 and how to control it all can be
set by a program.
Test mode control input pins.
The test mode is selected when these pins are set high
and normal operation is selected when they are low.
These pins normally must be held low or left open (NC)
when used for this purpose. (Pulldown resistors are
built-in).
CD control output pins.
These pins can be switched for output ports by a program.
Digital output pin.
Subcode block sync output pin. It outputs a high at the S1
position when subcode sync is detected.
·
· SPCK : Processor status signal readout
· SPDA : Processor status signal output.
· COFS : Correction system frame clock output
although normally in a high-impedance state, this
input during AD conversion becomes a 10 k
load, typ. Therefore, pay careful attention to the
output impedance that is input to this pin.
/HSO
: Playback speed mode output.
Function And Operation
High = normal speed;
Low = double speed.
clock output (176.4 kHz)
(7.35 kHz).
6
DD
) can
Remarks
2002-10-21
TC9457F
Š
Š
Š
Š
Š
Š