a8837 Allegro MicroSystems, Inc., a8837 Datasheet - Page 7

• Manufacturer Part Number: a8837
• Description: Photoflash Capacitor Charger With Igbt Driver
• Manufacturer: Allegro MicroSystems, Inc.

Overview
The A8837 is a photoflash capacitor charger control IC with
adjustable input current limiting. It also integrates an IGBT
driver for strobe operation of the flash tube, dramatically saving
board space in comparison to discrete solutions for strobe flash
operation. The control logic is shown in the functional block
diagram.
The charging operation of the A8837 is started by a low-to-high
signal on the CHARGE pin, provided that V
level. If CHARGE is already high before V
another low-to-high transition on the CHARGE pin is required
to start the charging. The primary peak current is set by input
clock signals from the CHARGE pin. When a charging cycle is
initiated, the transformer primary side current, I
linearly at a rate determined by the combined effect of the battery
voltage, V
I
is turned off immediately, allowing the energy to be pushed into
the photoflash capacitor, C
The secondary side current drops linearly as C
switching cycle starts again, either after the transformer flux is
reset, or after a predetermined time period, t
whichever occurs first.
The output voltage, V
and R
transformer secondary winding. This resistor string forms a volt-
age divider that feeds back to the FB pin. The resistors must be
sized to achieve a desired output voltage level based on a typical
value of 1.205 V at the FB pin. As soon as V
desired value, the charging process is terminated. Toggling the
CHARGE pin can start a refresh operation.
Input Current Limiting
The peak current limit can be adjusted to eight different levels,
from 700 mA to 2.0 A, by clocking the CHARGE pin. An inter-
nal digital circuit decodes the input clock signals to a counter,
which sets the charging time. This flexible scheme allows the
user to operate the flash circuit according to different battery
A8837
Primary
3
(see application circuit diagrams), connected across the
reaches the current limit, I
BATT
, and the primary side inductance, L
OUT
, is sensed by a resistor string, R
OUT
, from the secondary winding.
SWLIM
, the internal MOSFET
IN
OFF(Max)
IN
OUT
reaches V
OUT
is above V
Primary
reaches the
charges. The
Primary
Functional Description
(18 μs),
Photoflash Capacitor Charger with IGBT Driver
, ramps up
UVLO
. When
UVLO
1
, R
,
2
,
CHARGE
input voltages. The battery life can be effectively extended by
setting a lower current limit at low battery voltages.
Figure 4 shows the ILIM clock timing scheme protocol. The
total ILIM setup time, t
decoder circuit to receive ILIM inputs and set I
rent limit pulses during t
Figure 5 shows the timing definition of the primary current
limiting circuit. At the end of the setup period, t
Figure 4. ILIM Clock Timing Definition
Figure 5. Current Limit Programming Example (I
I
SW
Clock input at
CHARGE pin
0 μs
Four rising edges
within t
20 μs
0 μs
Start ILIM counter
ILIM(SU)
t
first pulse width
t
ILIM1(H)
ILIM(L)
First rising
edge
ILIM(SU)
t
ILIM(SU)
ILIM(SU)
≥ 0.2 μs
= min.
54 μs
ILIM setup time
115 Northeast Cutoff, Box 15036
Allegro MicroSystems, Inc.
Worcester, Massachusetts 01615-0036 [phone]
www.allegromicro.com
20 μs
=
, denotes the time needed for the
Switching
(54 μs) period.
starts
Subsequent rising
edges (0 to 7)
t
Reset ILIM counter
ILIM(H)
I
SWLIM4
SWLIM4
≥ 0.2 μs
= 1.4 A
SWLIM
ILIM(SU)
54 μs
selected).
Switching
. Apply cur-
starts
, primary
Switching
stops
7