W133 Cypress Semiconductor Corp., W133 Datasheet - Page 10

• Manufacturer Part Number: W133
• Description: Spread Spectrum System Frequency Synthesizer
• Manufacturer: Cypress Semiconductor Corp.

2.5V AC Electrical Characteristics
T
f
Spread Spectrum function turned off
AC clock parameters are tested and guaranteed over stated operating conditions using the stated lump capacitive load at the
clock output.
CPU Clock Outputs, CPU0:3 (Lump Capacitance Test Load = 20 pF)
CPUdiv2 Clock Outputs, CPUdiv2_0:1 (Lump Capacitance Test Load = 20 pF)
Note:
37. Period, Jitter, offset, and skew measured on rising edge at 1.25V.
XTL
Parameter
t
t
t
t
t
t
t
t
f
Z
Parameter
t
t
t
t
t
t
t
t
f
Z
A
P
H
L
R
F
D
JC
SK
ST
P
H
L
R
F
D
JC
SK
ST
o
o
= 0°C to +70°C, V
= 14.31818 MHz
[37]
Period
High Time
Low Time
Output Rise Edge Rate Measured from 0.4V to 2.0V
Output Fall Edge Rate
Duty Cycle
Jitter, Cycle-to-Cycle
Output Skew
Frequency Stabiliza-
tion from Power-up
(cold start)
AC Output Impedance
Period
High Time
Low Time
Output Rise Edge Rate Measured from 0.4V to 2.0V
Output Fall Edge Rate
Duty Cycle
Jitter, Cycle-to-Cycle
Output Skew
Frequency Stabiliza-
tion from Power-up
(cold start)
AC Output Impedance
Description
Description
DDQ3
= 3.3V±5%, V
Measured on rising edge at 1.25V
Duration of clock cycle above 2.0V
Duration of clock cycle below 0.4V
Measured from 2.0V to 0.4V
Measured on rising and falling edge at
1.25V
Measured on rising edge at 1.25V. Max-
imum difference of cycle time between
two adjacent cycles.
Measured on rising edge at 1.25V
Assumes full supply voltage reached
within 1 ms from power-up. Short cycles
exist prior to frequency stabilization.
Average value during switching transi-
tion. Used for determining series termi-
nation value.
Measured on rising edge at 1.25V
Duration of clock cycle above 2.0V
Duration of clock cycle below 0.4V
Measured from 2.0V to 0.4V
Measured on rising and falling edge at
1.25V
Measured on rising edge at 1.25V. Max-
imum difference of cycle time between
two adjacent cycles.
Measured on rising edge at 1.25V
Assumes full supply voltage reached
within 1 ms from power-up. Short cycles
exist prior to frequency stabilization.
Average value during switching transi-
tion. Used for determining series termi-
nation value.
PRELIMINARY
DDQ2
Test Condition/Comments
Test Condition/Comments
= 2.5V±5%
10
Min. Typ. Max. Min. Typ. Max.
Min. Typ. Max. Min. Typ. Max.
1.87
1.67
5.25
5.05
7.5
45
CPU = 133 MHz
15
45
CPU = 133MHz
1
1
1
1
20
20
7.65
15.3
250
175
250
175
55
55
4
4
3
4
4
3
3.0
2.8
7.5
7.3
10
45
CPU = 100 MHz
20
45
CPU = 100MHz
1
1
1
1
20
20
10.2
20.4
250
175
250
175
55
55
4
4
3
4
4
3
W133
V/ns
Unit
V/ns
V/ns
Unit
V/ns
ms
ms
ps
ps
ns
ns
ns
ps
ns
ns
ns
ps
%
%