a6a595 Allegro MicroSystems, Inc., a6a595 Datasheet - Page 6

• Manufacturer Part Number: a6a595
• Description: Ic Pwr Drvr 8bit Address 20dip
• Manufacturer: Allegro MicroSystems, Inc.

A. Data Active Time Before Clock Pulse
B. Data Active Time After Clock Pulse
C. Clock Pulse Width, t
D. Time Between Clock Activation
E. Strobe Pulse Width, t
F. Output Enable Pulse Width, t
NOTE – Timing is representative of a 12.5 MHz clock.
Higher speeds are attainable.
DATA OUT
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OUTPUT
OUTPUT
STROBE
ENABLE
ENABLE
DATA IN
CLOCK
SERIAL
SERIAL
OUT
OUT
(Data Set-Up Time), t
(Data Hold Time), t
and Strobe, t
N
N
A
DATA
su(ST)
50%
B
t
p
C
w(CLK)
....................................................... 50 ns
w(ST)
LOW = ALL OUTPUTS ENABLED
h(D)
50%
D
50%
su(D)
50%
.............................................. 20 ns
.............................................. 50 ns
............................................. 40 ns
.......................................... 20 ns
w(OE)
t
PHL
50%
................................ 4.5 s
E
HIGH = ALL OUTPUTS DISABLED
t
p
t
PLH
DATA
90%
t
DATA
f
50%
HIGH = OUTPUT OFF
LOW = OUTPUT ON
10%
Dwg. WP-029-2
Dwg. WP-030-2
t
DATA
r
register on the rising edge of the CLOCK input pulse. On
succeeding CLOCK pulses, the registers shift data information
towards the SERIAL DATA OUTPUT.
respective latch on the rising edge of the STROBE input pulse
(serial-to-parallel conversion).
source drivers are disabled (OFF). The information stored in the
latches is not affected by the OUTPUT ENABLE input. With
the OUTPUT ENABLE input low, the outputs are controlled by
the state of their respective latches.
Serial data present at the input is transferred to the shift
Information present at any register is transferred to the
When the OUTPUT ENABLE input is high, the output
DMOS POWER DRIVER
8-BIT SERIAL-INPUT,
6A595