PCA9531 Philips Semiconductors (Acquired by NXP), PCA9531 Datasheet - Page 6

• Manufacturer Part Number: PCA9531
• Description: 8-bit I2C Led Dimmerthe PCA9531 is an 8-bit i C And Smbus I/o Expander Optimized For Dimming Leds in 256 Discrete Steps For Red/green/blue (RGB) Color Mixing And Back Light Applications. The PCA9531 Contains an Internal Oscillator With Two User Progr
• Manufacturer: Philips Semiconductors (Acquired by NXP)

Philips Semiconductors
POWER-ON RESET
When power is applied to V
the PCA9531 in a reset state until V
point, the reset condition is released and the PCA9531 registers are
initialized to their default states, all the outputs in the off state.
EXTERNAL RESET
A reset can be accomplished by holding the RESET pin low for a
minimum of t
be held in their default state until the RESET input is once again
high.
This input requires a pull-up resistor to V
CHARACTERISTICS OF THE I
The I
or modules. The two lines are a serial data line (SDA) and a serial
clock line (SCL). Both lines must be connected to a positive supply
via a pull-up resistor when connected to the output stages of a device.
Data transfer may be initiated only when the bus is not busy.
Bit transfer
One data bit is transferred during each clock pulse. The data on the
SDA line must remain stable during the HIGH period of the clock
pulse as changes in the data line at this time will be interpreted as
control signals (see Figure 6).
2003 Nov 10
8-bit I
SDA
SCL
2
C-bus is for 2-way, 2-line communication between different ICs
2
W
C LED dimmer
. The PCA9531 registers and I
TRANSMITTER/
RECEIVER
MASTER
SDA
SCL
DD
, an internal Power On Reset holds
START condition
DD
RECEIVER
SLAVE
has reached V
2
S
DD
C-BUS
.
2
C state machine will
Figure 7. Definition of start and stop conditions
POR
Figure 8. System configuration
TRANSMITTER/
RECEIVER
. At this
SLAVE
6
Start and stop conditions
Both data and clock lines remain HIGH when the bus is not busy. A
HIGH-to-LOW transition of the data line, while the clock is HIGH is
defined as the start condition (S). A LOW-to-HIGH transition of the
data line while the clock is HIGH is defined as the stop condition (P)
(see Figure 7).
System configuration
A device generating a message is a transmitter: a device receiving
is the receiver. The device that controls the message is the master
and the devices which are controlled by the master are the slaves
(see Figure 8).
TRANSMITTER
MASTER
SDA
SCL
STOP condition
TRANSMITTER/
data valid
RECEIVER
data line
Figure 6. Bit transfer
MASTER
stable;
P
SLAVE
change
allowed
of data
SW00365
SDA
SCL
MULTIPLEXER
I
2
C
PCA9531
Product data
SW00366
SW00363