el7585il-t7 Intersil Corporation, el7585il-t7 Datasheet - Page 15

• Manufacturer Part Number: el7585il-t7
• Description: Tft-lcd Power Supply
• Manufacturer: Intersil Corporation

Typical fault thresholds for FBP, FBL, FBN and FBB are
included in the tables. PG and DELB fault thresholds are
typically 0.6V.
C
voltage within its normal range. If C
boost regulator will attempt to regulate to 0V. If C
shorted H, the regulator switches to P mode.
If any of the regulated outputs (V
V
circuitry will switch off until the output returns to its expected
value.
If V
prevent damage to the chip. While in current limit, the part
acts like a current source and the regulated output will drop.
If the output drops below the fault threshold, a ramp will be
initiated on C
the chip will be disabled on completion of the ramp.
In some circumstances, (depending on ambient temperature
and thermal design of the board), continuous operation at
current limit may result in the over-temperature threshold
being exceeded, which will cause the part to disable
immediately.
All I/O also have ESD protection, which in many cases will
also provide overvoltage protection, relative to either ground
or V
abs max ratings are exceeded.
INT
LOGIC
BOOST
DD
has an internal current-limited clamp to keep the
. However, these will not generally operate unless
) are driven above their target levels the drive
is excessively loaded, the current limit will
DELAY
and, provided that the fault is sustained,
15
BOOST
INT
is shorted low, the
, V
ON
, V
OFF
INT
is
or
EL7585
Component Selection for Start-Up Sequencing and
Fault Protection
The C
to stabilize the V
22nF to 1µF and should not be more than five times the
capacitor on C
The C
range from 47nF minimum to several microfarads - only
limited by the leakage in the capacitor reaching µA levels.
C
above). Note with 220nF on C
typically 50ms and the use of a larger/smaller value will vary
this time proportionally (e.g. 1µF will give a fault time-out
period of typically 230ms).
Fault Sequencing
The EL7585 has an advanced fault detection system which
protects the IC from both adjacent pin shorts during
operation and shorts on the output supplies.
A high quality layout/design of the PCB, in respect of
grounding quality and decoupling is necessary to avoid
falsely triggering the fault detection scheme - especially
during start-up. The user is directed to the layout guidelines
and component selection sections to avoid problems during
initial evaluation and prototype PCB generation.
DEL
REF
DEL
should be at least 1/5 of the value of C
capacitor is typically 220nF and has a usable
capacitor is typically set at 220nF and is required
DEL
REF
to ensure correct start-up operation.
output. The range of C
DEL
the fault time-out will be
REF
REF
is from
(See
March 9, 2006
FN7345.2