lm2791ldx-l National Semiconductor Corporation, lm2791ldx-l Datasheet - Page 10

• Manufacturer Part Number: lm2791ldx-l
• Description: Current Regulated Switched Capacitor Led Driver With Analog Brightness Control
• Manufacturer: National Semiconductor Corporation

www.national.com
Application Information
BRIGHTNESS CONTROL USING PWM
Brigthness control can be implemented by pulsing a signal at
the SD pin. The recommended signal should be between
100Hz to 1kHz. If the operating PWM frequency is much less
than 100Hz, flicker may be seen in the LEDs. Likewise, if
frequency is much higher, brightness in the LEDs will not be
linear. When a PWM signal is used to drive the SD pin of the
LM2791, connect BRGT pin to a maximun of GND. R
value is selected using the above I
pin is used. The brigthness is controlled by increasing and
decreasing the duty cycle of the PWM. Zero duty cycle will
turn off the brigthness and a 50% duty cycle waveform
produces an average current of 7.5mA if R
produce a maximum LED current of 15mA. So the LED
current varies linearly with the duty cycle.
PARALLEL Dx OUTPUTS FOR INCREASED CURRENT
DRIVE
Outputs D1 and D2 may be connected together to drive a
single LED. In such a configuration, two parallel current
sources of equal value drive the single LED. R
V
the outputs is programmed to 50% of the total desired LED
current. For example, if 30mA is the desired drive current for
the single LED, R
the current through each of the outputs is 15mA. Connecting
the outputs in parallel does not affect internal operation of
the LM2791and has no impact on the Electrical Character-
istics and limits previously presented. The available Dx out-
put current, maximum Dx voltage, and all other specifica-
tions provided in the Electrical Characteristics table apply to
this parallel output configuration, just as they do to the
standard 2-LED application circuit.
THERMAL PROTECTION
The LM2791 has internal thermal protection circuitry to dis-
able the charge pump if the junction temperature exceeds
150˚C. This feature will protect the device from damage due
to excessive power dissipation. The device will recover and
operate normally when the junction temperature falls below
the maximum operating junction temperature of 100˚C. It is
important to have good thermal conduction with a proper
layout to reduce thermal resistance.
POWER EFFICIENCY
An ideal power efficiency for a voltage doubler switched
capacitor converter is given as the output voltage of the
doubler over twice the input voltage as follows:
BRGT
should be chosen so that the current through each of
SET
and V
BRGT
should be selected so that
SET
equation as if BRGT
(Continued)
SET
is set to
SET
and
SET
10
In the case of the LM2791, a more accurate efficiency cal-
culation can be applied as the given formula below.
It is clear that the efficiency will depend on the supply voltage
in the above equation. As such, the lower the supply voltage,
the higher the efficiency.
POWER DISSIPATION
The maximum allowable power dissipation that this package
is capable of handling can be determined as follows:
where T
ambient temperature, and θ
thermal resistance of the specified package.
The actual power dissipation of the device can be calculated
using this equation:
As an example, if V
= 3.0V and worse case current consumption is 32mA (16mA
for each diode).
Power dissipation must be less than that allowed by the
package. Please refer to the Absolute Maximum Rating of
the LM2791.
PCB LAYOUT CONSIDERATIONS
The LLP is a leadframe based Chip Scale Package (CSP)
with very good thermal properties. This package has an
exposed DAP (die attach pad) at the center of the package
measuring 2.0mm x 1.2mm. The main advantage of this
exposed DAP is to offer lower thermal resistance when it is
soldered to the thermal land on the PCB. For PCB layout,
National highly recommends a 1:1 ratio between the pack-
age and the PCB thermal land. To further enhance thermal
conductivity, the PCB thermal land may include vias to a
ground plane. For more detailed instructions on mounting
LLP packages, please refer to National Semiconductor Ap-
plication Note AN-1187.
Efficiency = (V
Efficiency = ((V
P
JMax
Dissipation
P
is the maximum junction temperature, T
Dissipation
P
DIODE
DMax
IN
= ((2
D1
* I
in the target application is 4.2V, V
V
* I
D1
= (T
= (2V
*
DIODE
4.2) -3.0)
DIODE
) + (V
JMax
IN
JA
/ 2V
) / ( V
D2
-V
- T
is the junction-to-ambient
* I
DIODE
*
IN
0.032 = 173mW
A
D2
) / θ
IN
)) / (I
* I
)
*
JA
I
DIODE
LOAD
SUPPLY
* Gain) =
* V
A
IN
DIODE
is the
)