sc4508a Semtech Corporation, sc4508a Datasheet - Page 17

• Manufacturer Part Number: sc4508a
• Description: Sc4508a Buck Or Buck-boost Inverting Current-mode Controller
• Manufacturer: Semtech Corporation

use R
Since S
use C
function (magnitude and phase) is shown in Figure 10.
Figure 10. The loop transfer function Bode plot of the
buck-boost example.
It is clear that the resulted crossover frequency is about
1kHz with phase margin 90
In some initial prototypes, if the circuit noise makes the
control loop jitter, it is suggested to use a bigger C
than the calculated one here. Effectively, the converter
Application Information (Cont.)
POWER MANAGEMENT
2007 Semtech Corp.
20 log T f ( )
0
180
π
⋅
2
3
arg T f ( )
= 2k .
(
zRHP
= 3.3nF. The Bode plot of the loop transfer
(
−
−
−
180
<s
80
60
40
)
z1
)
100
120
140
160
180
23.33
43.33
26.67
, it is further calculated that::
80
6.67
C
40
60
10
1
R
3
1
1
2
1
R
10
2
s
10
p
1
1
1
s
C
zRHP
100 1 . 10
2
o
100 1 . 10
.
. 2
03
. 2
f
f
3
92
k
3
1 . 10
1 . 10
nF
4
4
1 . 10
1 . 10
10 10
5
10 10
5
×
1 . 10
1 . 10
⋅
5
3
5
6
6
value
17
bandwidth is reduced in order to reject some high
frequency noises. In the final working circuit, the loop
transfer function should be measured using network
analyzer and compared with the design to ensure circuit
stability under different line and load conditions. The load
transient response behavior is further tested and
measured to meet the specification.
Layout Guidelines
In order to achieve optimal electrical, thermal and noise
performance for high frequency converters, attention
must be paid to the PCB layouts. The goal of layout
optimization is to place components properly and identify
the high di/dt loops to minimize them. The following
guideline should be used to ensure proper functions of
the converters.
1. A ground plane is recommended to minimize noises
2. Start the PCB layout by placing the power components
3. The VDD bypass capacitors should be placed next to
4. Separate the power ground from the signal ground.
5. The trace connecting the feedback resistors to the
7. Minimize the loop including input capacitors, top/
8. Maximize the trace width of the loop connecting the
9. Connect the ground of the feedback divider and the
and copper losses, and maximize heat dissipation.
first. Arrange the power circuit to achieve a clean
power flow route. Put all the connections on one side
of the PCB with wide copper filled areas if possible.
the VDD and PGND, AGND pins respectively.
In SC4508A, the power ground PGND connection
should make PFET driving current loop as small as
possible. The signal ground AGND should be tied to
the negative terminal of the output capacitor.
output should be short, direct and far away from the
noise sources such as switching node and switching
components. Minimize the traces between OUT and
the gates of the PFETs to reduce their impedance to
drive the MOSFET.
bottom MOSFETs. This loop passes high di/dt current.
Make sure the trace width is wide enough to reduce
copper losses in this loop.
inductor, PFET and the output capacitors.
compensation components directly to the AGND pin
of the SC4508A by using a separate ground trace.
Then connect this pin to the ground of the output
capacitor as close as possible.
SC4508A
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