ncp5217a ON Semiconductor, ncp5217a Datasheet - Page 12

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ncp5217a

Manufacturer Part Number
ncp5217a
Description
Single Synchronous Step-down Controller
Manufacturer
ON Semiconductor
Datasheet

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turned on again whenever V
threshold. EN resets or power recycle the device can exit the
fault. The following diagram shows the typical waveform
when OVP event occurs.
Undervoltage Protection (UVP)
voltage event. The undervoltage limit is 80% of the nominal
V
LED1
FB
R3
An UVP circuit monitors the V
M5
J1
Default = Close
voltage. If the V
R4
PGND
V5
LED2
J1
R5
Figure 22. Overvoltage Protection
Top to Bottom : SWN, DL, V
+5V
+5V
R1
R2
J100
COMP
J100
Default = Open
C4
R7
R11
3
FB
1
2
SW1
voltage is below this threshold over
PGOOD
C2
1−2 = FCCM Mode
OFF = Skip Mode
3−2 = Disable
R8
C3
R6
C1
R9
AGND
FB
FB
2
3
4
5
6
goes above upper UV
CS+
CS−/Vo
COMP
FB
PGOOD
EN_SKIP
voltage to detect under
AGND
o
, PGOOD
EN_SKIP
1
7
U1
DL/TRESET
Figure 24. Demo Board Schematic
IDRP/OCP
PGND
BST
14
8
SWN
VCC
DH
R12
C5
13
12
11
10
9
http://onsemi.com
R10
C6
R18
1−2 = OCP Only
3−2 = OCP + AVP
R13
12
D1
C20
1
J2
R14
R16
R17
AGND
2
3
R15
consecutive 8 clock cycles, an UV fault is set and the device
is latched off such that both top and bottom gate drives are
off. EN resets or power recycle the device can exit the fault.
Thermal Shutdown
150°C. The IC restarts operation only after the junction
temperature drops below 125°C.
The IC will shutdown if the die temperature exceeds
M3
M1
PGND
Figure 23. Undervoltage Protection
M4
R21
Top to Bottom : SWN, V
C10
M2
R19
D2
C7 C8 C9 C11
L1
R20
C14
C15
C17
C18
o
, PGOOD
D3
VOUT
PGND
BNC1
PGND
VIN
VIN_GND

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