ncp5214 ON Semiconductor, ncp5214 Datasheet - Page 24

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ncp5214

Manufacturer Part Number
ncp5214
Description
2-in-1 Notebook Ddr Power Controller
Manufacturer
ON Semiconductor
Datasheet

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VDDQ is finished. The C
it reaches about 2.5 V to 3.0 V.
soft−start capacitor according to the following equation:
temperature coefficient, such as B, X5R, X7R ceramic
capacitors are recommended to be used as the C
capacitors with Y5V temperature characteristic are not
recommended.
Soft−Start of VTT Active Terminator
current source to charge up the VTT output capacitor
during VTT soft−start. Besides, the VTT source current
limit is reduced to about 1.0 A for 128 internal clock cycles
to minimize the inrush current during VTT soft−start.
Therefore, the VTT soft−start time t
by the equation:
where C
and I
Boost Supply Diode and Capacitor
boost voltage for the supply of the high−side gate driver of
the bulk regulator. Schottky diode with low forward
voltage should be used to ensure higher floating gate drive
voltage can be applied across the gate and the source of the
high−side MOSFET. A Schottky diode with 30 V reverse
voltage and 0.5 A DC current ratings can be used as the
boost supply diode for most applications. A 0.1 mF to
0.22 mF ceramic capacitor should be sufficient as the boost
capacitor.
VTTI Input Power Supply for VTT and VTTR
current. VTTI is normally connected to the VDDQ output
for optimum performance. If VTTI is connected to VDDQ,
no bypass capacitor is required to add to VTTI since the
bulk capacitor at VDDQ output is sufficiently large.
Besides, the maximum load current of VDDQ is the sum of
I
and components selection of the VDDQ buck regulator.
VTTI can also be connected to an external voltage source.
However, extra power dissipation will be generated from
the internal VTT high−side MOSFET and more
heatsinking is required if the external voltage is higher than
VDDQ. Whereas, the headroom will be limit by the R
of the VTT linear regulator high−side MOSFET, and the
maximum VTT output current with VTT within regulation
window will also be reduced if the external voltage is lower
than VDDQ. Besides, the VTTI pin input must be bypassed
VDDQ(max)
The soft−start time t
Ceramic capacitors with low tolerance and low
The VTT source current limit is used as a constant
An external diode and capacitor are used to generate the
Both VTT and VTTR are supplied by VTTI for sourcing
LIMVTSS
OUTVTT
and I
is the VTT soft−start source current limit.
t SSVTT [
is the capacitance of VTT output capacitor
VTT(max)
t ss [
ss
ss
C OUTVTT
when making electrical design
0.8
will continue to charge up until
can be programmed by the
I LIMVTSS
I ss
C ss
SSVTT
VTT
can be estimated
SS
. Ceramic
(eq. 40)
(eq. 41)
http://onsemi.com
DS(on)
NCP5214
24
to VTTGND with at least a 10 mF capacitor if external
voltage source is used.
Design Example
following design parameters is shown below:
DDR2 VDDQ bulk converter design parameters:
size in parallel are used.
output current, such that:
considered and supposes two 220 mF capacitors in parallel
are used as an initially guess, such that:
Lv
1.5 mH, 1.8 mH and 2.2 mH can be used. As a trade−off
between smaller overshoot and better efficiency, the
average value of 1.8 mH inductor is selected.
I L(rated) + 1.2
14 A or larger can be used.
inductance as a rule of thumb, then:
I CIN(RMS) w 10 A
A design example of a VDDQ bulk converter with the
a. Calculate input capacitor rms ripple current rating and
Therefore, two 10 mF 25 V ceramic capacitors with 1210
b. Calculate inductance, rated current and DCR of
First, suppose ripple current is 0.3 times the maximum
Second, the overshoot requirement at load release is then
Thus, inductors with standard inductance values of
Then, the maximum rated DC current is calculated by:
Therefore, inductor with maximum rated DC current of
Finally, the DCR of inductor is 2.0 mW per mH of
440 mF
L w
voltage rating:
inductor:
1. Input voltage range: 7.0 V to 20 V.
2. Nominal V
3. Static tolerance: 2% ("36 mV).
4. Transient tolerance: "100 mV.
5. Maximum output current: 10 A
6. Load transient step: 1.0 A to 8.0 A.
7. Switching frequency: 400 kHz.
8. Bandwidth: 100 kHz.
9. Soft−start time: 400 ms.
(I
0.3
+ 13.39 A
VDDQ(max)
(20 V−1.836 V)
V CIN(rating) w 20
DCR + 2 mW
( (100 mV )1.836 V) 2 −(1.836 V) 2 )
10 A
OUT
7 A )
10 A )
= 8.0 A, I
1 mH
20 V
: 1.8 V.
0.3 7 A
1.836 V
8.0 V
2
2
(20 V−1.836 V)
1.836 V
1.8 mH + 3.6 mW
VTT(max)
400 kHz
1.8 mH
2
1.25 V + 25 V
* 1.836 V
+ 1.39 mH
= 2.0 A).
8.0 V
400 kHz
1.836 V
2
+2.56 mH
+ 4.2 A
(eq. 47)
(eq. 42)
(eq. 43)
(eq. 44)
(eq. 45)
(eq. 46)
20

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