ncp5173mn ON Semiconductor, ncp5173mn Datasheet - Page 11

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ncp5173mn

Manufacturer Part Number
ncp5173mn
Description
1.5 A 560 Khz-1.0 Mhz Boost Regulator
Manufacturer
ON Semiconductor
Datasheet
amplifier output resistance and C1 as:
The first zero generated by C1 and R1 is:
has at least a 45° phase margin at the crossover frequency.
Therefore, this zero should be placed close to the pole
generated in the power stage which can be identified at
frequency:
where:
filter’s ESR zero or at half the switching frequency. Placing
the pole at this frequency will cut down on switching noise.
The frequency of this pole is determined by the value of C2
and R1:
design the frequency response with a −20 dB per decade
slope, until unity−gain crossover. The crossover frequency
should be selected at the midpoint between f
the phase margin is maximized.
V
the maximum output voltage plus the output diode forward
voltage. The diode forward voltage is typically 0.5 V for
Schottky diodes and 0.8 V for ultrafast recovery diodes:
f P1 +
f Z1 +
f P +
f P2 +
Figure 26. Bode Plot of the Compensation Network
SW
The low frequency pole, f
The phase lead provided by this zero ensures that the loop
C
R
The high frequency pole, f
One simple method to ensure adequate phase margin is to
In the boost topology, V
O
LOAD
Voltage Limit
2pC O R LOAD
= equivalent output capacitance of the error amplifier
≈120 pF;
2pC1R1
2pC1R O
2pC2R1
= load resistance.
1
1
1
1
V SW(MAX) + V OUT(MAX) )V F
f
P1
Shown in Figure 25
Frequency (LOG)
f
Z1
SW
P1,
P2
pin maximum voltage is set by
, can be placed at the output
is determined by the error
f
P2
Z1
and f
P2
http://onsemi.com
where
11
where:
where:
spike superimposed on top of the steady−state voltage.
Usually this voltage spike is caused by transformer leakage
inductance charging stray capacitance between the V
PGND pins. To prevent the voltage at the V
exceeding the maximum rating, a transient voltage
suppressor in series with a diode is paralleled with the
primary windings. Another method of clamping switch
voltage is to connect a transient voltage suppressor between
the V
Magnetic Component Selection
factors such as peak current, core and ferrite material, output
voltage ripple, EMI, temperature range, physical size and
cost. In boost circuits, the average inductor current is the
product of output current and voltage gain (V
assuming 100% energy transfer efficiency. In continuous
conduction mode, inductor ripple current is:
where:
half of the ripple current, which should not cause inductor
saturation. The above equation can also be referenced when
selecting the value of the inductor based on the tolerance of
the ripple current in the circuits. Small ripple current
provides the benefits of small input capacitors and greater
output current capability. A core geometry like a rod or
barrel is prone to generating high magnetic field radiation,
but is relatively cheap and small. Other core geometries,
such as toroids, provide a closed magnetic loop to prevent
EMI.
Input Capacitor Selection
filter, as shown in Figure 28. In continuous mode, the input
current waveform is triangular and does not contain a large
pulsed current, as shown in Figure 27. This reduces the
requirements imposed on the input capacitor selection.
During continuous conduction mode, the peak to peak
inductor ripple current is given in the previous section. As
we can see from Figure 27, the product of the inductor
current ripple and the input capacitor’s effective series
resistance (ESR) determine the V
applications, input capacitors in the range of 10 mF to
100 mF with an ESR less than 0.3 W work well up to a full
1.5 A switch current.
V
In the flyback topology, peak V
N = transformer turns ratio, primary over secondary.
When the power switch turns off, there exists a voltage
When choosing a magnetic component, one must consider
The peak inductor current is equal to average current plus
In boost circuits, the inductor becomes part of the input
f = 560 kHz
F
SW
= output diode forward voltage.
V SW(MAX) + V CC(MAX) )(V OUT )V F )
pin and ground.
I RIPPLE +
V CC (V OUT * V CC )
(f)(L)(V OUT)
SW
voltage is governed by:
CC
ripple. In most
SW
OUT
pin from
N
SW
/V
CC
and
),

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