ncp5392p ON Semiconductor, ncp5392p Datasheet - Page 29

• Manufacturer Part Number: ncp5392p
• Description: 2/3/4-phase Controller For Cpu Applications
• Manufacturer: ON Semiconductor

OVP Improved Performance
OVP protection is enabled as soon as soft-start begins and
is disabled when part is disabled. When OVP is tripped, the
controller commands all four gate drivers to enable their
low side MOSFETs and VR_RDY transitions low. In order
to recover from an OVP condition, V
UVLO threshold. See the state diagram for further details.
The OVP circuit monitors the output of DIFFOUT. If the
DIFFOUT signal reaches 180 mV (typical) above the
nominal 1.3 V offset the OVP will trip and VRRDY will be
pulled low, after eight consecutive OVP events are
detected, all PWMs will be latched. The DIFFOUT signal
is the difference between the output voltage and the DAC
voltage (minus 19 mV if in VR11.1 modes) plus the 1.3 V
internal offset. This results in the OVP tracking on the DAC
Figure 23. 10 A Load, VID Down, into PSI (Two Phase)
The overvoltage protection threshold is not adjustable.
Figure 24. 10 A Load, VID Up, Out of PSI
(Two Phase)
CC
must fall below the
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NCP5392P
29
voltage even during a dynamic change in the VID setting
during operation.
Gate Driver and MOSFET Selection
companion gate driver IC. The NCP5359 driver is
optimized to work with a range of MOSFETs commonly
used in CPU applications. The NCP5359 provides special
functionality including power saving mode operation and
is required for high performance dynamic VID operation.
Contact your local ON Semiconductor applications
engineer for MOSFET recommendations.
Board Stackup and Board Layout
traces and control lines that propagate away from the
controller IC. Routing should follow the demo board
example. For further information or layout review contact
ON Semiconductor.
ON Semiconductor provides the NCP5359 as a
Close attention should be paid to the routing of the sense
Figure 25. VR11.1, 1.6 V OVP Event
Figure 26. AMD, 1.55 V OVP Event