s-8211caz-i6t1g Seiko Instruments Inc., s-8211caz-i6t1g Datasheet - Page 15

• Manufacturer Part Number: s-8211caz-i6t1g
• Description: Battery Protection Ic For 1-cell Pack
• Manufacturer: Seiko Instruments Inc.

Rev.5.4
Test Circuits
Caution Unless otherwise specified, the output voltage levels “H” and “L” at CO pin (V
(1) Overcharge Detection Voltage, Overcharge Release Voltage
(2) Overdischarge Detection Voltage, Overdischarge Release Voltage
(3) Discharge Overcurrent Detection Voltage
(4) Load Short-circuiting Detection Voltage
(5) Charge Overcurrent Detection Voltage
(6) Operating Current Consumption
(Test Condition 1, Test Circuit 1)
Overcharge detection voltage (V
from “H” to “L” when the voltage V1 is gradually increased from the starting condition of V1 = 3.5 V. Overcharge
release voltage (V
when the voltage V1 is then gradually decreased. Overcharge hysteresis voltage (V
between overcharge detection voltage (V
(Test Condition 2, Test Circuit 2)
Overdischarge detection voltage (V
from “H” to “L” when the voltage V1 is gradually decreased from the starting condition of V1 = 3.5 V, V2 = 0 V.
Overdischarge release voltage (V
from “L” to “H” when the voltage V1 is then gradually increased. Overdischarge hysteresis voltage (V
the difference between overdischarge release voltage (V
(Test Condition 3, Test Circuit 2)
Discharge overcurrent detection voltage (V
delay time for changing V
overcurrent delay time when the voltage V2 is increased rapidly (within 10
V1 = 3.5 V, V2 = 0 V.
(Test Condition 3, Test Circuit 2)
Load short-circuiting detection voltage (V
delay time for changing V
delay time when the voltage V2 is increased rapidly (within 10 s) from the starting condition of V1 = 3.5 V, V2 = 0 V.
(Test Condition 4, Test Circuit 2)
Charge overcurrent detection voltage (V
time for changing V
time when the voltage V2 is decreased rapidly (within 10 s) from the starting condition of V1 = 3.5 V, V2 = 0 V.
(Test Condition 5, Test Circuit 2)
The operating current consumption (I
of V1 = 3.5 V and V2 = 0 V (normal status).
_00
judged by the threshold voltage (1.0 V) of the N-channel FET. Judge the CO pin level with respect to
V
VM
and the DO pin level with respect to V
CL
CO
) is defined as the voltage between the VDD pin and VSS pin at which V
from “H” to “L” lies between the minimum and the maximum value of charge overcurrent delay
DO
DO
from “H” to “L” lies between the minimum and the maximum value of load short-circuiting
from “H” to “L” lies between the minimum and the maximum value of discharge
CU
DU
) is defined as the voltage between the VDD pin and VSS pin at which V
DL
) is defined as the voltage between the VDD pin and VSS pin at which V
) is defined as the voltage between the VDD pin and VSS pin at which V
OPE
CIOV
) is the current that flows through the VDD pin (I
CU
SHORT
Seiko Instruments Inc.
) and overcharge release voltage (V
DIOV
) is defined as the voltage between the VM pin and VSS pin whose delay
) is defined as the voltage between the VM pin and VSS pin whose
) is defined as the voltage between the VM pin and VSS pin whose
BATTERY PROTECTION IC FOR 1-CELL PACK
SS
.
DU
) and overdischarge detection voltage (V
CL
).
s) from the starting condition of
HC
) is defined as the difference
DD
CO
) under the set conditions
) and DO pin (V
CO
S-8211C Series
goes from “L” to “H”
DL
HD
).
) is defined as
CO
DO
DO
DO
goes
) are
goes
goes
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