s-8243b Seiko Instruments Inc., s-8243b Datasheet - Page 18

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s-8243b

Manufacturer Part Number
s-8243b
Description
Battry Protection Ic For 3-serial Or 4-serial Cell Pack
Manufacturer
Seiko Instruments Inc.
Datasheet
18
BATTERY PROTECTION IC FOR 3-SERIAL OR 4-SERIAL CELL PACK
S-8243A/B Series
4. CTL pins
The S-8243 has four control pins. The CTL1 and CTL2 pins are used to control the COP and DOP pin output voltages.
CTL1 takes precedence over CTL2. CTL2 takes precedence over the battery protection circuit. The CTL3 and CTL4
pins are used to control the VBATOUT pin output voltage.
*1. States are controlled by voltage detection circuit.
*2. Off state is brought after the overcharge detection delay time t
*1. CTL3 and CTL4 pins should be open when a microcomputer is not used.
Caution Please note unexpected behavior might occur when electrical potential difference between the
CTL1 pin
CTL3 pin
Open
Open
Open
Open
Open
Open
High
High
High
High
High
High
Low
Low
Low
Low
Low
Low
*1
CTL pin (“L” level) and VSS is generated through the external filter (R
input voltage fluctuations.
Input
Input
CTL2 pin
CTL4 pin
Open
Open
Open
Open
Open
Open
High
High
High
High
High
High
Low
Low
Low
Low
Low
Low
*1
Table 10 CTL3 and CTL4 Mode
Table 9 CTL1 and CTL2 Mode
External discharging FET
V1 × 0.2 + V1 Offset
V2 × 0.2 + V2 Offset
V3 × 0.2 + V3 Offset
V
BATOUT
Don’t use.
Don’t use.
Don’t use.
V1 Offset
V2 Offset
V3 Offset
Normal
Normal
Seiko Instruments Inc.
OFF
OFF
OFF
OFF
OFF
OFF
OFF
(A series)
*1
*1
Output
Output
External charging FET
V1 × 0.2 + V1 Offset
V2 × 0.2 + V2 Offset
V3 × 0.2 + V3 Offset
V4 × 0.2 + V4 Offset
CU
V
.
BATOUT
Don’t use.
V1 Offset
V2 Offset
V3 Offset
V4 Offset
Normal
Normal
OFF
OFF
OFF
OFF
OFF
OFF
OFF
(B series)
*2
*1
*1
VSS
and C
VSS
) as a result of
Rev.2.5
_00

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