s-8242bac-i8t1g Seiko Instruments Inc., s-8242bac-i8t1g Datasheet - Page 8

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s-8242bac-i8t1g

Manufacturer Part Number
s-8242bac-i8t1g
Description
Battery Protection Ic For 2-serial-cell Pack
Manufacturer
Seiko Instruments Inc.
Datasheet
8
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
S-8242B Series
Caution Unless otherwise specified, the output voltage levels “H” and “L” at CO pin (V
1. Overcharge Detection Voltage, Overcharge Release Voltage
2. Overdischarge Detection Voltage, Overdischarge Release Voltage
3. Overcurrent Detection Voltage 1, Overcurrent Detection Voltage 2
4. Charger Detection Voltage
Test Circuits
(Test Condition 1, Test Circuit 1)
(Test Condition 2, Test Circuit 2)
(Test Condition 3, Test Circuit 2)
(Test Condition 4, Test Circuit 2)
Overcharge detection voltage 1 (V
from “H” to “L” when the voltage V1 is gradually increased from the starting condition of V1 = V2 = V
V. Overcharge release voltage 1 (V
from “L” to “H” when setting V2 = 3.5 V and the voltage V1 is then gradually decreased. Overcharge hysteresis
voltage 1 (V
voltage 1 (V
Overcharge detection voltage 2 (V
from “H” to “L” when the voltage V2 is gradually increased from the starting condition of V1 = V2 = V
V. Overcharge release voltage 2 (V
from “L” to “H” when setting V1 = 3.5 V and the voltage V2 is then gradually decreased. Overcharge hysteresis
voltage 2 (V
voltage 2 (V
Overdischarge detection voltage 1 (V
goes from “H” to “L” when the voltage V1 is gradually decreased from the starting condition of V1 = V2 = 3.5 V, V3 = 0
V. Overdischarge release voltage 1 (V
goes from “L” to “H” when setting V2 = 3.5 V and the voltage V1 is then gradually increased. Overdischarge
hysteresis voltage 1 (V
overdischarge detection voltage 1 (V
Overdischarge detection voltage 2 (V
goes from “H” to “L” when the voltage V2 is gradually decreased from the starting condition of V1 = V2 = 3.5 V, V3 = 0
V. Overdischarge release voltage 2 (V
goes from “L” to “H” when setting V1 = 3.5 V and the voltage V2 is then gradually increased. Overdischarge
hysteresis voltage 2 (V
overdischarge detection voltage 2 (V
Overcurrent detection voltage 1 (V
for changing V
the voltage V3 is increased rapidly within 10 µs from the starting condition of V1 = V2 = 3.5 V, V3 = 0 V.
Overcurrent detection voltage 2 (V
for changing V
the voltage V3 is increased rapidly within 10 µs from the starting condition of V1 = V2 = 3.5 V, V3 = 0 V.
The charger detection voltage (V
from “L” to “H” when the voltage V3 is gradually decreased from 0 V after the voltage V1 is gradually increased from
the starting condition of V1 = 1.8 V, V2 = 3.5 V, V3 = 0 V until the voltage V1 becomes V
The charger detection voltage can be measured only in a product whose overdischarge hysteresis V
judged by the threshold voltage (1.0 V) of the N-channel FET. Judge the CO pin level with respect to
V
VM
and the DO pin level with respect to V
CL1
CL2
HC1
HC2
DO
DO
).
).
) is defined as the difference between overcharge detection voltage 1 (V
) is defined as the difference between overcharge detection voltage 2 (V
from “H” to “L” lies between the minimum and the maximum value of overcurrent delay time 1 when
from “H” to “L” lies between the minimum and the maximum value of overcurrent delay time 2 when
HD1
HD2
) is defined as the difference between overdischarge release voltage 1 (V
) is defined as the difference between overdischarge release voltage 2 (V
CHA
CU1
CU2
IOV1
IOV2
DL1
DL2
) is defined as the voltage between the VM pin and VSS pin at which V
CL1
CL2
) is defined as the voltage between the VDD pin and VC pin at which V
) is defined as the voltage between the VC pin and VSS pin at which V
DL1
DL2
) is defined as the voltage between the VM pin and VSS pin whose delay time
) is defined as the voltage between the VM pin and VSS pin whose delay time
) is defined as the voltage between the VDD and VC pins at which V
).
).
) is defined as the voltage between the VC and VSS pins at which V
DU1
DU2
) is defined as the voltage between the VDD pin and VC pin at which V
) is defined as the voltage between the VC pin and VSS pin at which V
) is defined as the voltage between the VDD pin and VC pin at which V
) is defined as the voltage between the VC pin and VSS pin at which V
Seiko Instruments Inc.
SS
.
DL1
CU1
CU2
+ (V
CO
) and overcharge release
) and overcharge release
) and DO pin (V
HD
HD1
≠ 0 V.
/2).
CU
CU
–0.05 V, V3 = 0
–0.05 V, V3 = 0
Rev.1.9
DU1
DU2
CO
CO
CO
DO
CO
DO
) and
) and
goes
) are
goes
goes
goes
goes
_00
DO
DO
DO
DO

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