br93ll46f ROHM Co. Ltd., br93ll46f Datasheet

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br93ll46f

Manufacturer Part Number
br93ll46f
Description
1,024-bit Serial Electrically Erasable Prom
Manufacturer
ROHM Co. Ltd.
Datasheet

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The BR93LC46F and BR93LL46FV are CMOS serial input / output-type memory circuits (EEPROMs) that can be
programmed electrically. Each is configured of 64 words
vidually and data read from it and written to it. Operation control is performed using five types of commands. The
commands, addresses, and data are input through the DI pin under the control of the CS and SK pins. In a write
operation, the internal status signal (READY or BUSY) can be output from the DO pin.
• Low power CMOS technology
• 64 16 bit configuration
• 1.8V to 4.0V operation
• Low power dissipation
• Auto increment for efficient data dump
• Automatic erase-before-write
• Hardware and software write protection
• 8-pin SOP / 8-pin SSOP-B packages
• Device status signal during write cycle
• 100,000 ERASE / WRITE cycles
• 10 years Data Retention
Features
Overview
– 0.5mA (typ.) active current
– 0.4 A (typ.) standby current
– Defaults to write-disabled state at power up
– Software instructions for write-enable / disable
– Vcc lockout inadvertent write protection
1,024-Bit Serial Electrically Erasable PROM
BR93LL46F / BR93LL46FV
Memory ICs
16 bits (1,024 bits), and each word can be accessed indi-
Pin assignments
Pin descriptions
Pin Name
GND
N.C.
N.C.
DO
V
CS
SK
DI
CC
N.C.
V
CS
SK
CC
Not connected
Power supply
Chip select input
Serial clock input
Start bit, operating code, address, and
serial data input
Serial data output, READY / BUSY
internal status display output
Ground
Not connected
1
2
3
4
(SOP8 / SSOP-B8)
BR93LL46F
BR93LL46FV
Function
8
6
5
7
N.C.
GND
DO
DI
1

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br93ll46f Summary of contents

Page 1

... Data Retention • Overview The BR93LC46F and BR93LL46FV are CMOS serial input / output-type memory circuits (EEPROMs) that can be programmed electrically. Each is configured of 64 words vidually and data read from it and written to it. Operation control is performed using five types of commands. The commands, addresses, and data are input through the DI pin under the control of the CS and SK pins ...

Page 2

... AMP. register Symbol Limits V – 350 Pd 2 300 Tstg – 125 Topr – — – 0 0.3 CC Limits 1.8 ~ 4.0 CC 2 BR93LL46F / BR93LL46FV 6bit 1,024-bit EEPROM array 16bit Unit Unit Conditions – — ...

Page 3

... CSH t 400 — DIH t — — PD1 t — — PD0 t — — — — — — BR93LL46F / BR93LL46FV = 1.8 to 4.0V) CC Conditions — — 1.0mA 100 GND OUT OPEN, f ...

Page 4

... SK clock, data corresponding to the specified address is output, with data corresponding to upper addresses then output in sequence. (Auto increment function When the write command is executed, all data in the selected memory cell is erased automatically, and the input data is written to the cell. BR93LL46F / BR93LL46FV t CSH ...

Page 5

... Therefore, before performing a write command, the write enable command must be executed. When this command is executed, it remains valid until a write dis- able command is issued or the power supply is cut off. However, read commands can be used in either the write enable or write disable state. BR93LL46F / BR93LL46FV D15 ...

Page 6

... When in this status, all write commands are ignored, but read commands may be executed. In the write enable status, writing begins even if a write command is entered accidentally. To prevent errors of this type, we recommend executing a write disable command after writing has been completed. BR93LL46F / BR93LL46FV t STATUS ...

Page 7

... Figure a). Make sure all inputs are LOW during standby or when turning the power supply on or off (see Figure b (Figure b. Normal operation timing) BR93LL46F / BR93LL46FV Data Data 16bits b is turned off after CS is set to LOW ...

Page 8

... Even if the CS input is HIGH-Z, please be aware that cases such as this can occur. (4) Clock (SK) rise conditions If the clock pin (SK) signal of the BR93LL46F / FV has a long rise time (Tr) and if noise on the signal line exceeds a certain level, erroneous operation can occur due to erroneous counts in the clock. To prevent this, a Schmitt trigger is built into the SK input of the BR93LL- 46F / FV ...

Page 9

... Data collision between the -COM output and the DO output Within the input and output timing of the BR93LL46F / FV, the drive from the -COM output to the DI input and a signal output from the DO output can be emitted at the same time. This happens only for the 1 clock cycle (a dummy bit “ ...

Page 10

... High Write command DI: EEPROM DI terminal; DO: EEPROM DO output DO: -COM terminal 10 BR93LL46F / BR93LL46FV Fig. 8 Using an open drain port High-Z BUSY READY BUSY READY Command input Status detection Fig. 9 Timing diagram chart 3 ...

Page 11

... Memory ICs • External dimensions (Units: mm) BR93LL46F 5.0 0 1.27 0.4 0.1 0.3Min. SOP8 BR93LL46F / BR93LL46FV BR93LL46FV 3.0 0 (0.52) 0.65 0.22 0.1 0.15 SSOP-B8 0.3Min. 0.1 11 ...

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