fxla2203 Fairchild Semiconductor, fxla2203 Datasheet - Page 12

• Manufacturer Part Number: fxla2203
• Description: Fxla2203 Dual-mode, Dual-sim-card Level Translator
• Manufacturer: Fairchild Semiconductor

© 2010 Fairchild Semiconductor Corporation
FLXA2203 • Rev. 1.0.1
Power-Up / Power-Down Sequence
Table 4. Power Supply Pins
The V
however, V
The Enable pin must be LOW while V
up to valid supply voltages or ramp down to 0V.
A pull-up resistor tying enable to ground should be used
to ensure that bus contention, excessive currents, or
oscillations do not occur during power up or power
down. The size of the pull-up resistor is based upon the
current sinking capability of the device driving the
Enable pin.
Notes:
18. A=VCC becomes a valid voltage, EN=LOW.
19. B=VCC1, VCC2, and VCC_H_n become valid
20. C=FXLA2203 enabled (EN goes HIGH), ready for
Pin
1
2
3
4
5
voltages, EN=LOW.
activation (ISO7816-3).
CC
host power sequencing is non preferential;
Figure 15. Power-Up Sequencing
EN
I/O_H_n
I/O_n
VCC1, VCC2
VCC_H_n
VCC
RST_H_n
VCC_Cardn
RST_n
CLK_n
CH_Swap
CLK_H_n
CC
VCC_H_1
VCC_H_2
must be higher or equal to V
Name
VCC1
VCC2
VCC
A
Z
Z
Z
Z
Sequencing
Power-Up
EN and CH_Swap Supply
Z
Z
Z
Z
Power Switch 1 Input
Power Switch 2 Input
Z
Z
Z
Z
Host 1 Supply
Host 2 Supply
Function
B C
CC1
Z
Z
Z
Z
Timing per ISO7816
and V
Begin Activation
CC1
3 2006
and V
CC2
ramp
CC2
.
12
Notes:
21. A=Disable FXLA2203, bring EN LOW.
22. B=Ramp down VCC1, VCC2, and VCC_H_n.
23. C=Ramp down VCC once VCC1 and VCC2 are off.
Recommended power-up sequence (see Figure 15):
Recommended power-down sequence (see Figure 16):
1.
2.
3.
4.
5.
1. Complete deactivation timing (Figure 14).
2. Assert EN LOW (FXLA2203 disabled).
3. Ramp down power to VCC1, VCC2, VCC_H_1,
4. Once VCC1 and VCC2 are OFF, ramp down VCC.
Apply power to VCC.
Assert EN LOW (FXLA2203 disabled).
Apply power to VCC1, VCC2, VCC_H_1, and
VCC_H_2.
Assert EN HIGH (FXLA2203 enabled).
Begin activation timing (Figure 13).
and VCC_H_2.
Figure 16.
Power-Down Sequencing
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