DS1921H/Z Maxim Integrated Products, DS1921H/Z Datasheet - Page 15

• Manufacturer Part Number: DS1921H/Z
• Description: High Resolution Thermochron Ibutton Range H
• Manufacturer: Maxim Integrated Products

ADDRESS REGISTERS AND TRANSFER STATUS
Because of the serial data transfer, the DS1921H/Z employs three address registers, called TA1, TA2 and
E/S (Figure 9). Registers TA1 and TA2 must be loaded with the target address to which the data will be
written or from which data will be sent to the master upon a Read command. Register E/S acts like a byte
counter and transfer status register. It is used to verify data integrity with Write commands. Therefore, the
master only has read access to this register. The lower 5 bits of the E/S Register indicate the address of
the last byte that has been written to the scratchpad. This address is called Ending Offset. Bit 5 of the E/S
Register, called PF or “partial byte flag,” is set if the number of data bits sent by the master is not an
integer multiple of 8. Bit 6 is always a 0. Note that the lowest 5 bits of the target address also determine
the address within the scratchpad, where intermediate storage of data will begin. This address is called
byte offset. If the target address for a Write command is 13Ch, for example, then the scratchpad will store
incoming data beginning at the byte offset 1Ch and will be full after only 4 bytes. The corresponding
ending offset in this example is 1Fh. For best economy of speed and efficiency, the target address for
writing should point to the beginning of a new page, (i.e., the byte offset will be 0). Thus, the full 32-byte
capacity of the scratchpad is available, resulting also in the ending offset of 1Fh. However, it is possible
to write 1 or several contiguous bytes somewhere within a page. The ending offset together with the
Partial and Overflow Flag is mainly a means to support the master checking the data integrity after a
Write command. The highest valued bit of the E/S Register, called AA or Authorization Accepted,
indicates that a valid copy command for the scratchpad has been received and executed. Writing data to
the scratchpad clears this flag.
ADDRESS REGISTERS Figure 9
WRITING WITH VERIFICATION
To write data to the DS1921H/Z, the scratchpad has to be used as intermediate storage. First, the master
issues the Write Scratchpad command to specify the desired target address, followed by the data to be
written to the scratchpad. In the next step, the master sends the Read Scratchpad command to read the
scratchpad and to verify data integrity. As preamble to the scratchpad data, the DS1921H/Z sends the
requested target address TA1 and TA2 and the contents of the E/S Register. If the PF flag is set, data did
not arrive correctly in the scratchpad. The master does not need to continue reading; it can start a new
trial to write data to the scratchpad. Similarly, a set AA flag indicates that the Write command was not
recognized by the iButton. If everything went correctly, both flags are cleared and the ending offset
indicates the address of the last byte written to the scratchpad. Now the master can continue verifying
every data bit. After the master has verified the data, it has to send the Copy Scratchpad command. This
command must be followed exactly by the data of the three address registers TA1, TA2 and E/S as the
master has read them verifying the scratchpad. As soon as the DS1921H/Z has received these bytes, it
will copy the data to the requested location beginning at the target address.
Target Address (TA1)
Target Address (TA2)
Ending Address with
Data Status (E/S)
(Read Only)
Bit #
T15
AA
T7
7
T14
T6
6
0
T13
PF
T5
5
T12
T4
E4
4
15 of 40
T11
T3
E3
3
T10
T2
E2
2
T1
E1
T9
1
T0
E0
T8
0