dm74as533 National Semiconductor Corporation, dm74as533 Datasheet

no-image

dm74as533

Manufacturer Part Number
dm74as533
Description
Octal D-type Transparent Latch With Tri-state Outputs
Manufacturer
National Semiconductor Corporation
Datasheet
C 1995 National Semiconductor Corporation
DM74AS533 Octal D-Type Transparent
Latch with TRI-STATE Outputs
General Description
These 8-bit registers feature totem-pole TRI-STATE outputs
designed specifically for driving highly-capacitive or relative-
ly low-impedance loads The high-impedance state and in-
creased high-logic-level drive provide these registers with
the capability of being connected directly to and driving the
bus lines in a bus-organized system without need for inter-
face or pull-up components They are particularly attractive
for implementing buffer registers I O ports bidirectional
bus drivers and working registers
The eight inverting latches of the AS533 are transparent D-
type latches meaning that while the enable (G) is high the Q
outputs will follow the complement of the data (D) inputs
When the enable is taken low the output will be latched at
the complement of the level of the data that was set up
A buffered output control input can be used to place the
eight outputs in either a normal logic state (high or low logic
Connection Diagram
TRI-STATE is a registered trademark of National Semiconductor Corporation
TL F 6311
Order Number DM74AS533WM or DM74AS533N
See NS Package Number M20B or N20A
Dual-In-Line Package
levels) or a high-impedance state In the high-impedance
state the outputs neither load nor drive the bus lines signifi-
cantly
The output control does not affect the internal operation of
the latches That is the old data can be retained or new
data can be entered even while the outputs are off
Features
Y
Y
Y
Y
Switching specifications at 50 pF
Switching specifications guaranteed over full tempera-
ture and V
Advanced oxide-isolated ion-implanted Schottky TTL
process
TRI-STATE buffer-type outputs drive bus lines directly
CC
range
RRD-B30M105 Printed in U S A
December 1989
TL F 6311 – 1

Related parts for dm74as533

dm74as533 Summary of contents

Page 1

... A buffered output control input can be used to place the eight outputs in either a normal logic state (high or low logic Connection Diagram Order Number DM74AS533WM or DM74AS533N See NS Package Number M20B or N20A TRI-STATE is a registered trademark of National Semiconductor Corporation C 1995 National Semiconductor Corporation ...

Page 2

Absolute Maximum Ratings Supply Voltage Input Voltage Voltage Applied to Disabled Output Operating Free Air Temperature Range Storage Temperature Range b Typical Package M Package Recommended Operating Conditions Symbol Parameter V Supply Voltage CC V High Level ...

Page 3

Switching Characteristics Symbol Parameter t Propagation Delay Time PLH Low to High Level Output t Propagation Delay Time PHL High to Low Level Output t Propagation Delay Time PLH Low to High Level Output t Propagation Delay Time PHL High ...

Page 4

... National does not assume any responsibility for use of any circuitry described no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications Small Outline Package (M) Order Number DM74AS533WM NS Package Number M20B Molded Dual-In-Line Package (N) Order Number DM74AS533N NS Package Number N20A 2 A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life ...

Related keywords