dm74as286 Fairchild Semiconductor, dm74as286 Datasheet - Page 3

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dm74as286

Manufacturer Part Number
dm74as286
Description
9-bit Parity Generator/checker With Bus-driver Parity I/o Port
Manufacturer
Fairchild Semiconductor
Datasheet
t
t
t
t
t
t
t
t
t
t
PLH
PHL
PLH
PHL
PLH
PHL
PZL
PLZ
PZH
PHZ
Switching Characteristics
over recommended supply and temperature range
Typical Applications
Symbol
Propagation Delay Time
from LOW-to-HIGH Level Output
Propagation Delay Time
from HIGH-to-LOW Level Output
Propagation Delay Time
from LOW-to-HIGH Level Output
Propagation Delay Time
from HIGH-to-LOW Level Output
Propagation Delay Time
from LOW-to-HIGH Level Output
Propagation Delay Time
from HIGH-to-LOW Level Output
Output Enable Time to LOW Level
Output Disable Time from LOW Level
Output Disable Time from HIGH Level
Output Enable Time to HIGH Level
Parameter
FIGURE 1. Dedicated 10-Bit Parity Sensing Configuration
0, 2, 4, 6, 8, 10
1, 3, 5, 7, 9
are Logic “1”
Number of
Inputs that
Any Data Input
Any Data Input
Any Data Input
Any Data Input
Parity I/O
Parity I/O
From
XMIT
XMIT
XMIT
XMIT
3
Even
Odd
Parity Error
Parity Error
Parity Error
Parity Error
Parity I/O
Parity I/O
Parity I/O
Parity I/O
Parity I/O
Parity I/O
To
Output
Result
Parity
H
L
Min
3
3
3
3
3
3
3
3
3
3
Max
16.5
16.5
11.5
www.fairchildsemi.com
15
14
16
10
13
9
9
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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