dm74als652 Fairchild Semiconductor, dm74als652 Datasheet

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dm74als652

Manufacturer Part Number
dm74als652
Description
Dm74als652 Octal 3-state Bus Transceiver And Register
Manufacturer
Fairchild Semiconductor
Datasheet

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© 2001 Fairchild Semiconductor Corporation
DM74ALS652WM
DM74ALS652NT
DM74ALS652
Octal 3-STATE Bus Transceiver and Register
General Description
This device incorporates an octal transceiver and an octal
D-type register configured to enable transmission of data
from bus to bus or internal register to bus.
This bus transceiver features totem-pole 3-STATE outputs
designed specifically for driving highly-capacitive or rela-
tively low-impedance loads. The high-impedance state and
increased high level logic drive provide this device with the
capability of being connected directly to and driving the bus
lines in a bus organized system without need for interface
or pull-up components. They are particularly attractive for
implementing buffer registers, I/O ports, bidirectional bus
drivers, and working registers.
The registers in the DM74ALS652 are edge-triggered
D-type flip-flops. On the positive transition of the clock
(CAB or CBA), the input data is stored into the appropriate
register. The CAB input controls the transfer of data into
the A register and the CBA input controls the B register.
The SAB and SBA control pins are provided to select
whether real-time data or stored data is transferred. A LOW
input level selects real-time data and a HIGH level selects
stored data. The select controls have a “make before
break” configuration to eliminate a glitch which would nor-
mally occur in a typical multiplexer during the transition
between stored and real-time data.
The enable (GAB and GBA) control pins provide four
modes of operation: real-time data transfer from bus A to
B, real-time data transfer from bus B to A, real-time bus A
and/or B data transfer to internal storage, or internal stored
data transfer to bus A and/or B.
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Order Number
Package Number
M24B
N24C
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
DS009174
Features
Switching specifications at 50 pF
Switching specifications guaranteed over full tempera-
ture and V
Advanced oxide-isolated, ion-implanted Schottky TTL
process
3-STATE buffer-type outputs drive bus lines directly
Independent registers and enables for A and B buses
Multiplexed real-time and stored data
Package Description
CC
range
October 1986
Revised June 2001
www.fairchildsemi.com

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dm74als652 Summary of contents

Page 1

... They are particularly attractive for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. The registers in the DM74ALS652 are edge-triggered D-type flip-flops. On the positive transition of the clock (CAB or CBA), the input data is stored into the appropriate register. The CAB input controls the transfer of data into the A register and the CBA input controls the B register ...

Page 2

Function Table Inputs GAB GBA CAB CBA H (Note ...

Page 3

Absolute Maximum Ratings Supply Voltage Input Voltage Control Inputs I/O Ports Operating Free-Air Temperature Range Storage Temperature Range Typical JA N Package M Package Recommended Operating Conditions Symbol Parameter V Supply Voltage CC V HIGH Level Input Voltage IH V ...

Page 4

Switching Characteristics over recommended operating free air temperature range Symbol Parameter t Propagation Delay Time PLH LOW-to-HIGH Level Output t Propagation Delay Time PHL HIGH-to-LOW Level Output t Propagation Delay Time PLH LOW-to-HIGH Level Output t Propagation Delay Time PHL ...

Page 5

Physical Dimensions inches (millimeters) unless otherwise noted 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide Package Number M24B 5 www.fairchildsemi.com ...

Page 6

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right ...

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