74lcx32646 Fairchild Semiconductor, 74lcx32646 Datasheet

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74lcx32646

Manufacturer Part Number
74lcx32646
Description
Voltage 32-bit Transceiver/register With Tolerant Inputs Outputs Preliminary
Manufacturer
Fairchild Semiconductor
Datasheet
© 2001 Fairchild Semiconductor Corporation
74LCX32646GX
(Note 2)
74LCX32646
Low Voltage 32-Bit Transceiver/Register
with 5V Tolerant Inputs and Outputs (Preliminary)
General Description
The LCX32646 contains thirty-two non-inverting bidirec-
tional registered bus transceivers with 3-STATE outputs,
providing multiplexed transmission of data directly from the
input bus or from the internal storage registers. Each byte
has separate control inputs which can be shorted together
for full 32-bit operation.The DIR
direction of data flow through the device. The CPAB
CPBA
HIGH transition (see Functional Description).
The LCX32646 is designed for low voltage (2.5V or 3.3V)
V
environment.
The LCX32646 is fabricated with an advanced CMOS tech-
nology to achieve high speed operation while maintaining
CMOS low power dissipation.
Ordering Code:
Note 2: BGA package available in Tape and Reel only.
Order Number
CC
applications with capability of interfacing to a 5V signal
n
inputs load data into the registers on the LOW-to-
Package Number
(Preliminary)
BGA114A
n
inputs determine the
114-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
[TAPE and REEL]
DS500635
n
and
Features
Note 1: To ensure the high-impedance state during power up or down, OE
should be tied to V
resistor is determined by the current-sourcing capability of the driver.
5V tolerant inputs and outputs
2.3V–3.6V V
5.2 ns t
Power down high impedance inputs and outputs
Supports live insertion/withdrawal (Note 1)
Implements patented noise/EMI reduction circuitry
Latch-up performance exceeds 500 mA
ESD performance:
Human Body Model
Machine Model
Packaged in plastic Fine-Pitch Ball Grid Array (FBGA)
(Preliminary)
24 mA Output Drive (V
Package Description
PD
max (V
CC
CC
through a pull-up resistor: the minimum value or the
specifications provided
CC
200V
2000V
3.3V), 20 A I
CC
August 2001
Revised August 2001
3.0V)
CC
www.fairchildsemi.com
max
Preliminary

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74lcx32646 Summary of contents

Page 1

... The LCX32646 is fabricated with an advanced CMOS tech- nology to achieve high speed operation while maintaining CMOS low power dissipation. Ordering Code: Order Number Package Number 74LCX32646GX BGA114A 114-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide (Note 2) (Preliminary) [TAPE and REEL] Note 2: BGA package available in Tape and Reel only. © ...

Page 2

Connection Diagram Pin Assignment for FBGA (Top Thru View) www.fairchildsemi.com Pin Descriptions Pin Names Description Side A Inputs or 3-STATE Outputs Side B Inputs or 3-STATE Outputs ...

Page 3

Truth Table (Note 3) Inputs OE DIR CPAB CPBA SAB ...

Page 4

Logic Diagrams Please note that these diagrams are provided only for the understanding of logic operations and should not be used to estimate propagation delays. www.fairchildsemi.com 4 Preliminary ...

Page 5

Logic Diagrams (Continued) Please note that these diagrams are provided only for the understanding of logic operations and should not be used to estimate propagation delays. 5 www.fairchildsemi.com Preliminary ...

Page 6

Functional Description In the transceiver mode, data present at the HIGH imped- ance port may be stored in either the register or both. The select (SAB , SBA ) controls can multiplex n n stored and real-time. ...

Page 7

Absolute Maximum Ratings Symbol Parameter V Supply Voltage Input Voltage Output Voltage Input Diode Current Output Diode Current Output Source/Sink Current Supply ...

Page 8

DC Electrical Characteristics Symbol Parameter I Quiescent Supply Current CC I Increase in I per Input CC CC Note 8: Outputs disabled or 3-STATE only. AC Electrical Characteristics Symbol Parameter f Maximum Clock Frequency MAX t Propagation Delay PHL t ...

Page 9

AC LOADING and WAVEFORMS FIGURE 1. AC Test Circuit (C Test PLH PZL PZH Waveform for Inverting and Non-Inverting Functions Propagation Delay. Pulse Width and t rec 3-STATE Output Low Enable ...

Page 10

Schematic Diagram Generic for LCX Family www.fairchildsemi.com 10 Preliminary ...

Page 11

Physical Dimensions inches (millimeters) unless otherwise noted 114-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right ...

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